Abstract: A system includes a transformer, a first controller, a discharge circuit to discharge an external capacitor based on an undervoltage threshold, and a second controller. The second controller is coupled to the discharge circuit, and is also coupled to receive a rectified Ac voltage and to receive control signals from the first controller. The second controller includes a gate driver to turn on a primary field effect transistor (FET). The second controller also includes a startup controller coupled to the gate driver. The startup controller is configured to increase a duty cycle of the primary FET based on whether a control signal is received from the first controller. The startup controller is also configured to determine a current duty cycle of the primary FET and to turn off the primary FET based on whether the voltage of the AC-DC converter is above an undervoltage threshold.

Abstract: A clock signal conversion circuit includes an amplification circuit configured to amplify a differential clock signal having sub rail-to-rail voltage swings relative to a supply voltage, such that an amplified differential clock signal output by the amplification circuit has complementary positive and negative signal components with full rail-to-rail voltage swings relative to the supply voltage.

Abstract: A clock signal conversion circuit includes an amplification circuit configured to amplify a differential clock signal having sub rail-to-rail voltage swings relative to a supply voltage, such that an amplified differential clock signal output by the amplification circuit has complementary positive and negative signal components with full rail-to-rail voltage swings relative to the supply voltage.

Abstract: A system and method for combining positive and negative voltage electrostatic discharge (ESD) protection into a clamp that uses cascoded circuitry, including detecting, by an electrostatic discharge protection system, a voltage pulse on an input pin of an integrated circuit (IC) controller, the IC controller coupled between a power supply node and a ground supply node; determining, by the ESD protection circuit, an ESD event on the input pin based on the voltage detected on the input pin; and/or controlling, by the ESD protection circuit during the ESD event, one or more clamps to transport the voltage pulse from the input pin of the IC controller to the power supply node.

Abstract: A system includes a transformer having a primary winding and an auxiliary winding at a primary side of an AC-DC converter, the auxiliary winding reflecting an output voltage of a secondary winding of the transformer. A primary side controller includes an over-voltage protection (OVP) pin and an OVP circuit. A voltage divider includes a first resistor coupled between the auxiliary winding and the OVP pin and a second resistor coupled between the first resistor and a ground. The voltage divider provides, to OVP pin, a reduced voltage that is proportional to the output voltage. In absence of a pulse signal from a secondary side controller, the OVP circuit turns off a gate driver that drives a primary switch in response to the OVP voltage exceeding a reference OVP voltage. The primary switch is coupled between the primary winding of the transformer and the ground.

Abstract: A system includes a transformer having a primary winding and an auxiliary winding at a primary side of an AC-DC converter, the auxiliary winding reflecting an output voltage of a secondary winding of the transformer. A primary side controller includes an over-voltage protection (OVP) pin and an OVP circuit. A voltage divider includes a first resistor coupled between the auxiliary winding and the OVP pin and a second resistor coupled between the first resistor and a ground. The voltage divider provides, to OVP pin, a reduced voltage that is proportional to the output voltage. In absence of a pulse signal from a secondary side controller, the OVP circuit turns off a gate driver that drives a primary switch in response to the OVP voltage exceeding a reference OVP voltage. The primary switch is coupled between the primary winding of the transformer and the ground.

Abstract: A system includes a transformer, a first controller, a discharge circuit to discharge an external capacitor based on an undervoltage threshold, and a second controller. The second controller is coupled to the discharge circuit, and is also coupled to receive a rectified Ac voltage and to receive control signals from the first controller. The second controller includes a gate driver to turn on a primary field effect transistor (FET). The second controller also includes a startup controller coupled to the gate driver. The startup controller is configured to increase a duty cycle of the primary FET based on whether a control signal is received from the first controller. The startup controller is also configured to determine a current duty cycle of the primary FET and to turn off the primary FET based on whether the voltage of the AC-DC converter is above an undervoltage threshold.

Abstract: A system and method for combining positive and negative voltage electrostatic discharge (ESD) protection into a clamp that uses cascoded circuitry, including detecting, by an electrostatic discharge protection system, a voltage pulse on an input pin of an integrated circuit (IC) controller, the IC controller coupled between a power supply node and a ground supply node; determining, by the ESD protection circuit, an ESD event on the input pin based on the voltage detected on the input pin; and/or controlling, by the ESD protection circuit during the ESD event, one or more clamps to transport the voltage pulse from the input pin of the IC controller to the power supply node.

Abstract: A system includes a transformer having an auxiliary coil to provide a flyback voltage to a primary side of an alternating current to direct current (AC-DC) converter. A primary side controller includes an auxiliary pin coupled to the transformer and to an external capacitor, the auxiliary pin to receive the flyback voltage after startup. a junction gate field-effect transistor (JFET) coupled to a supply voltage. A first FET is coupled in series between the JFET and the auxiliary pin, the JFET to charge the external capacitor from the supply voltage during startup. One or more depletion region diodes are coupled to a gate of the first FET, the one or more depletion region diodes to bias a voltage of the gate of the first FET to a specific voltage.

Abstract: A system includes a transformer having an auxiliary coil to provide a flyback voltage to a primary side of an alternating current to direct current (AC-DC) converter. A primary side controller includes an auxiliary pin coupled to the transformer and to an external capacitor, the auxiliary pin to receive the flyback voltage after startup. a junction gate field-effect transistor (JFET) coupled to a supply voltage. A first FET is coupled in series between the JFET and the auxiliary pin, the JFET to charge the external capacitor from the supply voltage during startup. One or more depletion region diodes are coupled to a gate of the first FET, the one or more depletion region diodes to bias a voltage of the gate of the first FET to a specific voltage.

Abstract: A secondary controlled AC-DC converter including an oscillator in a primary-side controller (PSC), and method for operating the same to enable soft-start and low frequency operation are provided. Generally, the method includes driving a power switch coupled between an AC input and a primary-side of the converter with a gate-drive (GD-signal). At startup and following auto-restart the GD-signal is generated using an oscillator-signal from the oscillator. After receiving start-stop pulses from a secondary-side controller, the oscillator-signal is decoupled from the GD-signal using a controller in the PSC, and the PSC begins generating the GD-signal using pulse-width-modulated (PWM) generated using the start-stop pulses. The oscillator operates at a first frequency independent of the PWM signal. The PWM signal includes one of a number of frequencies selected based on a power drawn from the converter, and, in low power applications can be less than the first frequency.

Abstract: A system includes a primary field effect transistor (FET) coupled to a primary winding on a primary side of an alternating current-to-direct current (AC-DC) converter. The system also includes a gate driver, coupled to the primary FET, that is to, in response to a signal received from a startup controller of the AC-DC converter, turn on the primary FET. The gate driver includes a voltage bias p-type metal-oxide-semiconductor (VBP) buffer coupled between an external supply voltage and a VBP portion of driving chain circuitry, the driving chain circuitry to drive a gate of the primary FET. The gate driver also includes a voltage bias n-type metal-oxide-semiconductor (VBN) buffer coupled between a VBN regulator, which generates an internal supply voltage, and a VBN portion of the driving chain circuitry.

Abstract: A direct charge transfer digital to analog converter comprising a single reference voltage linked through a switching structure to a charge accumulation device. An accumulated charge of the charge accumulation system represents the analog output voltage. Use of the single reference voltage in conjunction with the switching structure and charge accumulation system allows for a digital signal to be converted to an analog signal with lower power consumption. Use of a single reference voltage consumes less power and space thereby making it superior to prior art digital to analog conversion systems.

Abstract: A direct charge transfer digital to analog converter comprising a single reference voltage linked through a switching structure to a charge accumulation device. An accumulated charge of the charge accumulation system represents the analog output voltage. Use of the single reference voltage in conjunction with the switching structure and charge accumulation system allows for a digital signal to be converted to an analog signal with lower power consumption. Use of a single reference voltage consumes less power and space thereby making it superior to prior art digital to analog conversion systems.