Patents by Inventor Murugan SEKAR

Murugan SEKAR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11748520
    Abstract: An information handling system may include at least one processor; and a memory coupled to the at least one processor. The information handling system may be configured to: execute an application on the at least one processor, wherein at least a portion of data of the application is stored encrypted in a secure enclave region of the memory; and securely transfer execution of the application to a second information handling system by: transmitting platform configuration register (PCR) measurement data to the second information handling system; and transmitting the data of the application to the second information handling system; wherein the PCR measurement data is usable by the second information handling system to perform a remote attestation, the remote attestation including verification of the PCR measurement data to confirm that the data of the application has not been changed.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: September 5, 2023
    Assignee: Dell Products L.P.
    Inventors: Krishnaprasad K, Gobind Vijayakumar, Murugan Sekar
  • Publication number: 20220129591
    Abstract: An information handling system may include at least one processor; and a memory coupled to the at least one processor. The information handling system may be configured to: execute an application on the at least one processor, wherein at least a portion of data of the application is stored encrypted in a secure enclave region of the memory; and securely transfer execution of the application to a second information handling system by: transmitting platform configuration register (PCR) measurement data to the second information handling system; and transmitting the data of the application to the second information handling system; wherein the PCR measurement data is usable by the second information handling system to perform a remote attestation, the remote attestation including verification of the PCR measurement data to confirm that the data of the application has not been changed.
    Type: Application
    Filed: October 28, 2020
    Publication date: April 28, 2022
    Applicant: Dell Products L.P.
    Inventors: Krishnaprasad K., Gobind VIJAYAKUMAR, Murugan SEKAR
  • Patent number: 10824524
    Abstract: An information handling system may include one or more processors, a memory system communicatively coupled to the one or more processors, and a program of instructions embodied in non-transitory computer readable media and configured to, when read and executed by the one or more processors, create operating system level-mirroring of address spaces for data associated with one or more processes executing on the one or more processors and dynamically reallocate address spaces used for mirroring of the data for a process of the one or more processes from a first address space to a second address space responsive to a determination that a number of correctable bit errors of a memory page associated with the first address space exceeds a threshold.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: November 3, 2020
    Assignee: Dell Products L.P.
    Inventors: Krishnaprasad Koladi, Wei G. Liu, Gobind Vijayakumar, Murugan Sekar
  • Publication number: 20200142824
    Abstract: An information handling system may include one or more processors, a memory system communicatively coupled to the one or more processors, and a program of instructions embodied in non-transitory computer readable media and configured to, when read and executed by the one or more processors, create operating system level-mirroring of address spaces for data associated with one or more processes executing on the one or more processors and dynamically reallocate address spaces used for mirroring of the data for a process of the one or more processes from a first address space to a second address space responsive to a determination that a number of correctable bit errors of a memory page associated with the first address space exceeds a threshold.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 7, 2020
    Applicant: Dell Products L.P.
    Inventors: Krishnaprasad KOLADI, Wei G. LIU, Gobind VIJAYAKUMAR, Murugan SEKAR