Patents by Inventor Murugappan SENTHIVELAN

Murugappan SENTHIVELAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Device and method for hardware-efficient adaptive calculation of floating-point trigonometric functions using coordinate rotate digital computer (CORDIC)
    Patent number: 12050910
    Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store a trigonometric calculation instruction for evaluating a trigonometric function, and data registers comprising a first data register to store a floating-point input value associated with the trigonometric calculation instruction. The accelerator circuit further includes a determination circuit to identify the trigonometric calculation function and the floating-point input value associated with the trigonometric calculation instruction and determine whether the floating-point input value is in a small value range, and an approximation circuit to responsive to determining that the floating-point input value is in the small value, receive the floating-point input value and calculate an approximation of the trigonometric function with respect to the input value.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: July 30, 2024
    Inventors: Mayan Moudgill, Pablo Balzola, Murugappan Senthivelan, Vaidyanathan Ramdurai, Sitij Agrawal
  • Device and method for calculating elementary functions using successive cumulative rotation circuit
    Patent number: 11928465
    Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store an instruction for evaluating an elementary function, and data registers comprising a first data register to store an input value. The accelerator circuit further includes a successive cumulative rotation circuit comprising a reconfigurable inner stage to perform a successive cumulative rotation recurrence, and a determination circuit to determine a type of the elementary function based on the instruction, and responsive to determining that the input value is a fixed-point number, configure the reconfigurable inner stage to a configuration for evaluating the type of the elementary function, wherein the successive cumulative rotation circuit is to calculate an evaluation of the elementary function using the reconfigurable inner stage performing the successive cumulative rotation recurrence.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: March 12, 2024
    Inventors: Mayan Moudgill, Pablo Balzola, Murugappan Senthivelan, Vaidyanathan Ramdurai, Sitij Agrawal
  • DEVICE AND METHOD FOR HARDWARE-EFFICIENT ADAPTIVE CALCULATION OF FLOATING-POINT TRIGONOMETRIC FUNCTIONS USING COORDINATE ROTATE DIGITAL COMPUTER (CORDIC)
    Publication number: 20220137925
    Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store a trigonometric calculation instruction for evaluating a trigonometric function, and data registers comprising a first data register to store a floating-point input value associated with the trigonometric calculation instruction. The accelerator circuit further includes a determination circuit to identify the trigonometric calculation function and the floating-point input value associated with the trigonometric calculation instruction and determine whether the floating-point input value is in a small value range, and an approximation circuit to responsive to determining that the floating-point input value is in the small value, receive the floating-point input value and calculate an approximation of the trigonometric function with respect to the input value.
    Type: Application
    Filed: February 20, 2020
    Publication date: May 5, 2022
    Applicant: Optimum Semiconductor Technologies Inc.
    Inventors: Mayan MOUDGILL, Pablo BALZOLA, Murugappan SENTHIVELAN, Vaidyanathan RAMDURAI, Sitij AGRAWAL
  • DEVICE AND METHOD FOR CALCULATING ELEMENTARY FUNCTIONS USING SUCCESSIVE CUMULATIVE ROTATION CIRCUIT
    Publication number: 20220129262
    Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store an instruction for evaluating an elementary function, and data registers comprising a first data register to store an input value. The accelerator circuit further includes a successive cumulative rotation circuit comprising a reconfigurable inner stage to perform a successive cumulative rotation recurrence, and a determination circuit to determine a type of the elementary function based on the instruction, and responsive to determining that the input value is a fixed-point number, configure the reconfigurable inner stage to a configuration for evaluating the type of the elementary function, wherein the successive cumulative rotation circuit is to calculate an evaluation of the elementary function using the reconfigurable inner stage performing the successive cumulative rotation recurrence.
    Type: Application
    Filed: February 20, 2020
    Publication date: April 28, 2022
    Applicant: Optimum Semiconductor Technologies Inc.
    Inventors: Mayan MOUDGILL, Pablo BALZOLA, Murugappan SENTHIVELAN, Vaidyanathan RAMDURAI, Sitij AGRAWAL