Patents by Inventor Mustafa Eroz

Mustafa Eroz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7954036
    Abstract: An approach is provided for a method of encoding structure Low Density Parity Check (LDPC) codes. Memory storing information representing a structured parity check Matrix of Low Density Parity Check (LDPC) codes is accessed during the encoding process. The information is organized in tabular form, wherein each row represents occurrences of one Values within a first column of a group of columns of the parity check matrix. The rows correspond to groups of columns of the parity check matrix, wherein subsequent columns within each of the groups are derived according to a predetermined operation. An LDPC coded signal is output based on the stored information representing the parity check matrix.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: May 31, 2011
    Assignee: DTVG Licensing, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee
  • Publication number: 20110126076
    Abstract: An approach for reliably communicating over a satellite in support of a communication service including, for example, as direct broadcast satellite and data service, is disclosed. An input message is encoded, yielding a structured Low Density Parity Check (LDPC) coded message. The coded message is modulated according to a high order modulation scheme that has a signal constellation representing more than two symbols per signaling point—e.g., 8-PSK (Phase Shift Keying) and 16-QAM (Quadrature Amplitude Modulation). The system includes a transmitter configured to propagate the modulated signal over the satellite. The above approach is particularly applicable to bandwidth constrained communication systems requiring high data rates.
    Type: Application
    Filed: December 14, 2010
    Publication date: May 26, 2011
    Applicant: DTVG Licensing, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee, Dan Fraley
  • Patent number: 7925963
    Abstract: A method and apparatus for Turbo encoding uses a set of rate-compatible Turbo Codes optimized at high code rates and derived from a universal constituent code. The Turbo Codes have rate-compatible puncturing patterns. The method comprises: encoding a signal at a first and second encoder using a best rate 1/2 constituent code universal with higher code rates, the first encoder and the second encoder each producing a respective plurality of parity bits for each information bit; puncturing the respective plurality of parity bits at each encoder with a higher rate best puncturing patterns; and puncturing the respective plurality of parity bits at each encoder with a lower rate best puncturing pattern. In a variation, the best rate 1/2 constituent code represents a concatenation of polynomials 1+D2+D3 (octal 13) and 1+D+D3 (octal 15), D a data bit. A Turbo Encoder is provided which has hardware to implement the method.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: April 12, 2011
    Assignee: DTVG Licensing, Inc.
    Inventors: Mustafa Eroz, A. Roger Hammons, Jr.
  • Publication number: 20110060958
    Abstract: An approach is provided for encoding short frame length Low Density Parity Check (LDPC) codes. An encoder generates a LDPC code having an outer Bose Chaudhuri Hocquenghem (BCH) code. Structure is imposed on the LDPC codes by restricting portion part of the parity check matrix to be lower triangular and/or satisfying other requirements such that the communication between bit nodes and check nodes of the decoder is simplified. Further, a cyclic redundancy check (CRC) encoder is supplied to encode the input signal according to a CRC code. This approach has particular application in digital video broadcast services over satellite.
    Type: Application
    Filed: November 10, 2010
    Publication date: March 10, 2011
    Applicant: DTVG Licensing, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee
  • Publication number: 20110047435
    Abstract: An approach is provided for generating Low Density Parity Check (LDPC) codes. An LDPC encoder generates a short LDPC code by shortening longer mother codes. The short LDPC code has an outer Bose Chaudhuri Hocquenghem (BCH) code. According to another aspect, for an LDPC code with code rate of ? utilizing 8-PSK (Phase Shift Keying) modulation, an interleaver provides for interleaving bits of the output LDPC code by serially writing data associated with the LDPC code column-wise into a table and reading the data row-wise from right to left. The above approach has particular application in digital video broadcast services over satellite.
    Type: Application
    Filed: February 16, 2010
    Publication date: February 24, 2011
    Applicant: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee
  • Patent number: 7864869
    Abstract: An approach for reliably communicating over a satellite in support of a communication service including, for example, as direct broadcast satellite and data service, is disclosed. An input message is encoded, yielding a structured Low Density Parity Check (LDPC) coded message. The coded message is modulated according to a high order modulation scheme that has a signal constellation representing more than two symbols per signaling point—e.g., 8-PSK (Phase Shift Keying) and 16-QAM (Quadrature Amplitude Modulation). The system includes a transmitter configured to propagate the modulated signal over the satellite. The above approach is particularly applicable to bandwidth constrained communication systems requiring high data rates.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: January 4, 2011
    Assignee: DTVG Licensing, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee, Dan Fraley
  • Patent number: 7856586
    Abstract: An approach is provided for encoding short frame length Low Density Parity Check (LDPC) codes. An encoder generates a LDPC code having an outer Bose Chaudhuri Hocquenghem (BCH) code. Structure is imposed on the LDPC codes by restricting portion part of the parity check matrix to be lower triangular and/or satisfying other requirements such that the communication between bit nodes and check nodes of the decoder is simplified. Further, a cyclic redundancy check (CRC) encoder is supplied to encode the input signal according to a CRC code. This approach has particular application in digital video broadcast services over satellite.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: December 21, 2010
    Assignee: DTVG Licensing, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee
  • Patent number: 7840871
    Abstract: A method of providing forward error correction for data services uses a parallel concatenated convolutional code which is a Turbo Code comprising a plurality of eight-state constituent encoders wherein a plurality of data block sizes are used in conjunction with said Turbo Code. A variation uses the method in a cellular radio system. Another variation uses the method in both forward and reverse likes of a cellular radio system.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: November 23, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, A. Roger Hammons, Jr.
  • Patent number: 7840869
    Abstract: A method of providing forward error correction for data services uses a parallel concatenated convolutional code which is a Turbo Code comprising a plurality of eight-state constituent encoders wherein a plurality of data block sizes are used in conjunction with said Turbo Code. A variation uses the method in a cellular radio system. Another variation uses the method in both forward and reverse likes of a cellular radio system.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 23, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, A. Roger Hammons, Jr.
  • Patent number: 7827465
    Abstract: A method of terminating two or more constituent encoders of a turbo encoder employing a turbo code, comprising the step of: generating tail input bits at each of two or more constituent encoders, including deriving the tail input bits from each of the two or more constituent encoders separately from a contents of shift registers within each of the two or more constituent encoders, after an encoding of information bits by the two or more constituent encoders; puncturing one or more tail output bits such that 1/R output tail bits are transmitted for each of a plurality of trellis branches, wherein R is a turbo code rate employed by the turbo encoder during an information bit transmission. In yet another variation, the step of puncturing the tail output bits further comprises the step of: transmitting, during trellis termination, the tail output bits, only if they are sent from an output branch of one of the two or more constituent encoders that are used during information bit transmission.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 2, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, A. Roger Hammons, Jr.
  • Patent number: 7779329
    Abstract: A method of terminating two or more constituent encoders of a turbo encoder employing a turbo code, comprising the step of: generating tail input bits at each of two or more constituent encoders, including deriving the tail input bits from each of the two or more constituent encoders separately from a contents of shift registers within each of the two or more constituent encoders, after an encoding of information bits by the two or more constituent encoders; puncturing one or more tail output bits such that 1/R output tail bits are transmitted for each of a plurality of trellis branches, wherein R is a turbo code rate employed by the turbo encoder during an information bit transmission. In yet another variation, the step of puncturing the tail output bits further comprises the step of: transmitting, during trellis termination, the tail output bits, only if they are sent from an output branch of one of the two or more constituent encoders that are used during information bit transmission.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: August 17, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, A. Roger Hammons, Jr.
  • Patent number: 7770089
    Abstract: An approach is provided for generating Low Density Parity Check (LDPC) codes. An LDPC encoder generates a LDPC code with an outer Bose Chaudhuri Hocquenghem (BCH) code. For a rate 3/5 code, the approach provides a degree profile that yields reduced memory requirements for storage of the edge values without significantly affecting the performance with respect to an “unmodified” rate 3/5 code. The relevant parameters for the reduced memory LDPC codes are as follows: q=72, nldpc=64800, kldpc=nBCH=38880, kBCH=38688. The above approach has particular application in digital video broadcast services over satellite.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: August 3, 2010
    Assignee: DTVG Licensing, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee
  • Publication number: 20100192038
    Abstract: Methods and systems for designing LDPC codes are disclosed.
    Type: Application
    Filed: April 2, 2010
    Publication date: July 29, 2010
    Applicant: DTVG Licensing, Inc.
    Inventors: Mustafa Eroz, Lin-Nan Lee, Feng-Wen Sun
  • Patent number: 7761750
    Abstract: A method of interleaving blocks of indexed data of varying length is disclosed. The method includes the steps of: providing a set of basic Interleavers comprising a family of one or more permutations of the indexed data and having a variable length; selecting one of the basic Interleavers based upon a desired Interleaver length L; and adapting the selected basic Interleaver to produce an Interleaver having the desired Interleaver length L.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: July 20, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, A. Roger Hammons, Jr., Feng-Wen Sun
  • Patent number: 7725802
    Abstract: Methods and systems for designing LDPC codes are disclosed. A method in accordance with the present invention comprises configuring a plurality (M) of parallel accumulation engines, accumulating a first information bit at a first set of specific parity bit addresses using the accumulation engines, increasing a parity bit address for each of the parity bit addresses by a pre-determined offset for each new information bit, accumulating subsequent information bits at parity bit addresses offset from the parity bit addresses by a pre-determined offset until an M+1 information bit is reached, accumulating the next M information bits at a second set of specific parity bit addresses using the parallel accumulation engines, increasing a parity bit address for each member of the second set of parity bit addresses by the pre-determined offset for each new information bit; and repeating accumulating and increasing the addresses until the information bits are exhausted.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: May 25, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, Lin-Nan Lee, Feng-Wen Sun
  • Publication number: 20100122143
    Abstract: A multiple access scheme is described. One or more encoders are configured to encode a plurality of bit streams using Low Density Parity Check (LDPC) coding. The bit streams correspond to a respective plurality of terminals. The plurality of bit streams are converted to provide a multiple access scheme for the terminals.
    Type: Application
    Filed: January 12, 2010
    Publication date: May 13, 2010
    Applicant: Hughes Network Systems, LLC
    Inventors: Lin-Nan LEE, Mustafa Eroz
  • Publication number: 20100107032
    Abstract: An approach is provided for bit labeling of a signal constellation. A transmitter generates encoded signals using, according to one embodiment, a structured parity check matrix of a Low Density Parity Check (LDPC) code. The transmitter includes an encoder for transforming an input message into a codeword represented by a plurality of set of bits. The transmitter includes logic for mapping non-sequentially (e.g., interleaving) one set of bits into a higher order constellation (Quadrature Phase Shift Keying (QPSK), 8-PSK, 16-APSK (Amplitude Phase Shift Keying), 32-APSK, etc.), wherein a symbol of the higher order constellation corresponding to the one set of bits is output based on the mapping.
    Type: Application
    Filed: July 7, 2009
    Publication date: April 29, 2010
    Applicant: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee
  • Publication number: 20100098245
    Abstract: A spread scrambled multiple access (SSCMA) scheme is described. A first encoded bit stream of a first terminal is scrambled according to a first scrambling signature. A second encoded bit stream of a second terminal is scrambled according to a second scrambling signature. The first scrambled bit stream is spread to match a communication channel bandwidth. The second scrambled bit stream is spread to match the communication channel bandwidth.
    Type: Application
    Filed: December 24, 2009
    Publication date: April 22, 2010
    Applicant: Hughes Network Systems
    Inventors: Russell Fang, Mustafa Eroz, Neal Becker
  • Patent number: 7673226
    Abstract: An approach is provided for generating Low Density Parity Check (LDPC) codes. An LDPC encoder generates a short LDPC code by shortening longer mother codes. The short LDPC code has an outer Bose Chaudhuri Hocquenghem (BCH) code. According to another aspect, for an LDPC code with code rate of ? utilizing 8-PSK (Phase Shift Keying) modulation, an interleaver provides for interleaving bits of the output LDPC code by serially writing data associated with the LDPC code column-wise into a table and reading the data row-wise from right to left. The above approach has particular application in digital video broadcast services over satellite.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: March 2, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, Feng-Wen Sun, Lin-Nan Lee
  • Patent number: 7657797
    Abstract: A method of interleaving blocks of indexed data of varying length is disclosed. The method includes the steps of: providing a set of basic Interleavers comprising a family of one or more permutations of the indexed data and having a variable length; selecting one of the basic Interleavers based upon a desired Interleaver length L; and adapting the selected basic Interleaver to produce an Interleaver having the desired Interleaver length L.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: February 2, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Mustafa Eroz, A. Roger Hammons, Jr., Feng-Wen Sun