Patents by Inventor Mustafa Ispir

Mustafa Ispir has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220101997
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for processing representations of EEG measurements. One of the methods includes obtaining a plurality of EEG signal measurements corresponding to respective EEG trials of a user; generating a time-domain representation from the plurality of EEG signal measurements, where the time-domain representation includes a plurality of rows, and where each row corresponds to a different set of one or more EEG signal measurements; applying the time-domain representation as input to a neural network having a plurality of network parameters, final values of the network parameters having been determined by a transfer learning process where the neural network is initially trained to perform an image processing task and the neural network is subsequently trained to perform EEG analysis; and obtaining, from the neural network, a mental health prediction for the user.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Inventors: Asim Iqbal, Mustafa Ispir, Garrett Raymond Honke, Nina Thigpen, Vladimir Miskovic, Pramod Gupta
  • Publication number: 20220068476
    Abstract: Systems and processes described herein can expand a limited data set of EEG trials into a larger data set by resampling subsets of EEG trial data. Implementations may employ one or more of a variety of different resampling techniques. For example, a subset of the available training data is selected to form a new set of training data. The subset can be selected using replacement (e.g., a sample can be selected more than once, and thus represented multiple times in the new set of training data). Alternatively the subset can be selected without using replacement (e.g., each sample is able to be selected only once, and thus represented a maximum of one time in the new set of training data).
    Type: Application
    Filed: August 31, 2020
    Publication date: March 3, 2022
    Inventors: Katherine Elise Link, Vladimir Miskovic, Nina Thigpen, Mustafa Ispir, Garrett Raymond Honke, Pramod Gupta
  • Publication number: 20220054033
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for obtaining, from one or more electrodes, electroencephalographic (EEG) signals from a user; generating signal vectors from the EEG signals, each signal vector representing one channel of EEG signals. The actions include providing the signal vectors as input data to a variational autoencoder (VAE), wherein the VAE generates a latent representation of the input data, the latent representation having lower dimensionality than the signal vectors, and reconstructs the latent representation into an event related potential (ERP) of the corresponding EEG signal. The actions include providing, for display to a user, a graphical representation of the ERPs.
    Type: Application
    Filed: August 21, 2020
    Publication date: February 24, 2022
    Inventors: Garrett Raymond Honke, Pramod Gupta, Mustafa Ispir, Nina Thigpen
  • Publication number: 20220039735
    Abstract: A machine learning system for aggregating electroencephalographic (EEG) data in preparation for downstream analysis via further machine learning models. Machine learning models can be used to assist in diagnosis of various mental health conditions, brain-computer interface, mood detection systems, or other biometric functions. Implementations of the present disclosure, employ a portion of the transformer network (the attention encoder stack) to aggregate EEG trials or EEG data segments, in a data-driven way, by ensuring the important content of each trial is not lost. Each EEG trial to be aggregated is converted into an input embedding, or a vector which numerically represents the data in the trial.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 10, 2022
    Inventors: Mustafa Ispir, Edward Michel F De Brouwer, Pramod Gupta, Garrett Raymond Honke, Vladimir Miskovic
  • Publication number: 20220044106
    Abstract: A machine learning system for aggregating electroencephalographic (EEG) data, as well as external data, in preparation for downstream analysis via further machine learning models. Machine learning models can be used to assist in diagnosis of various mental health conditions, brain-computer interface, mood detection systems, or other biometric functions. Implementations of the present disclosure, employ a portion of the transformer network (the attention encoder stack) to aggregate EEG trials or EEG data segments, in a data-driven way, by ensuring the important content of each trial is not lost. Each EEG trial to be aggregated is converted into an input embedding, or a vector which numerically represents the data in the trial.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 10, 2022
    Inventors: Mustafa Ispir, Edward Michel F De Brouwer, Pramod Gupta, Garrett Raymond Honke, Vladimir Miskovic
  • Publication number: 20220015657
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating embeddings of EEG measurements. One of the methods includes obtaining a plurality of electroencephalogram (EEG) signal measurements of a user, wherein each EEG signal measurement corresponds to one of a plurality of prompt types of an EEG task; generating, from the plurality of EEG signal measurements, a plurality of network inputs each corresponding to a different prompt type of the plurality of prompt types of the EEG task; processing the network inputs using a twin neural network to generate respective network outputs each corresponding to a different prompt type of the plurality of prompt types of the EEG task; and providing the network outputs to a downstream neural network to generate a mental health prediction for the user.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Inventors: Mustafa Ispir, Pramod Gupta, Garrett Raymond Honke
  • Publication number: 20220015659
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating embeddings of EEG measurements. One of the methods includes obtaining a two-dimensional time-frequency electroencephalogram (EEG) representation corresponding to one or more EEG signal measurements of a user; processing the time-frequency EEG representation using a first neural network having a plurality of first network parameters to generate an embedding of the time-frequency EEG representation, wherein the first neural network has been trained using transfer learning; and providing the embedding of the time-frequency EEG representation to a downstream neural network to generate a mental health prediction for the user.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 20, 2022
    Inventors: Mustafa Ispir, Asim Iqbal, Pramod Gupta, Garrett Raymond Honke, Vladimir Miskovic
  • Publication number: 20210391086
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for obtaining psychological data, generating a psychopathological analysis data structure (PADS), applying a latent factor analysis algorithm to the PADS to obtain a psychopathological latent factor space (PLFS), generating a latent factor graph, and outputting the latent factor graph.
    Type: Application
    Filed: June 10, 2020
    Publication date: December 16, 2021
    Inventors: Vladimir Miskovic, Katherine Elise Link, Nina Thigpen, Mustafa Ispir, Garrett Raymond Honke, Pramod Gupta
  • Publication number: 20210383936
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving physiological data of a patient, obtaining ecological momentary assessment (EMA) data by sending an EMA data prompt, and receiving patient input responsive to the EMA data prompt; and generating, based on the EMA data and the physiological data, a graphical representation of the patient's idiomatic psychopathology symptom network as a symptom network graph.
    Type: Application
    Filed: June 3, 2020
    Publication date: December 9, 2021
    Inventors: Vladimir Miskovic, Katherine Elise Link, Mustafa Ispir, Pramod Gupta
  • Publication number: 20200372359
    Abstract: A system includes one or more computers and one or more storage devices storing instructions that when executed by the one or more computers cause the computers to implement a combined machine learning model for processing an input including multiple features to generate a predicted output for the machine learning input. The combined model includes: a deep machine learning model configured to process the features to generate a deep model output; a wide machine learning model configured to process the features to generate a wide model output; and a combining layer configured to process the deep model output generated by the deep machine learning model and the wide model output generated by the wide machine learning model to generate the predicted output, in which the deep model and the wide model have been trained jointly on training data to generate the deep model output and the wide model output.
    Type: Application
    Filed: August 12, 2020
    Publication date: November 26, 2020
    Inventors: Tal Shaked, Rohan Anil, Hrishikesh Balkrishna Aradhye, Mustafa Ispir, Glen Anderson, Wei Chai, Mehmet Levent Koc, Jeremiah Joseph Harmsen, Xiaobing Liu, Gregory Sean Corrado, Tushar Deepak Chandra, Heng-Tze Cheng
  • Patent number: 10762422
    Abstract: A system includes one or more computers and one or more storage devices storing instructions that when executed by the one or more computers cause the computers to implement a combined machine learning model for processing an input including multiple features to generate a predicted output for the machine learning input. The combined model includes: a deep machine learning model configured to process the features to generate a deep model output; a wide machine learning model configured to process the features to generate a wide model output; and a combining layer configured to process the deep model output generated by the deep machine learning model and the wide model output generated by the wide machine learning model to generate the predicted output, in which the deep model and the wide model have been trained jointly on training data to generate the deep model output and the wide model output.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: September 1, 2020
    Assignee: Google LLC
    Inventors: Tal Shaked, Rohan Anil, Hrishikesh Balkrishna Aradhye, Mustafa Ispir, Glen Anderson, Wei Chai, Mehmet Levent Koc, Jeremiah Harmsen, Xiaobing Liu, Gregory Sean Corrado, Tushar Deepak Chandra, Heng-Tze Cheng
  • Publication number: 20170300814
    Abstract: A system includes one or more computers and one or more storage devices storing instructions that when executed by the one or more computers cause the computers to implement a combined machine learning model for processing an input including multiple features to generate a predicted output for the machine learning input. The combined model includes: a deep machine learning model configured to process the features to generate a deep model output; a wide machine learning model configured to process the features to generate a wide model output; and a combining layer configured to process the deep model output generated by the deep machine learning model and the wide model output generated by the wide machine learning model to generate the predicted output, in which the deep model and the wide model have been trained jointly on training data to generate the deep model output and the wide model output.
    Type: Application
    Filed: December 29, 2016
    Publication date: October 19, 2017
    Inventors: Tal Shaked, Rohan Anil, Hrishikesh Balkrishna Aradhye, Mustafa Ispir, Glen Anderson, Wei Chai, Mehmet Levent Koc, Jeremiah Harmsen, Xiaobing Liu, Gregory Sean Corrado, Tushar Deepak Chandra, Heng-Tze Cheng
  • Patent number: 8645882
    Abstract: A method for designing an integrated circuit is described. The method comprises converting behavioral descriptions of the integrated circuit to register transfer level (RTL) descriptions. The method comprises at least one of the behavioral descriptions including frame synthesis with an input frame and a corresponding output frame. In one embodiment, the method further comprises providing at least two solutions for performing partial and complete operations for simulations as hardware component combinations, associating each solution with a cost, and selecting the solution with the lowest cost as the hardware component combination for a final design of the integrated circuit.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: February 4, 2014
    Assignee: Synopsys, Inc.
    Inventors: Mustafa Ispir, Levent Oktem
  • Publication number: 20130047128
    Abstract: A method for designing an integrated circuit is described. The method comprises converting behavioral descriptions of the integrated circuit to register transfer level (RTL) descriptions. The method comprises at least one of the behavioral descriptions including frame synthesis with an input frame and a corresponding output frame. In one embodiment, the method further comprises providing at least two solutions for performing partial and complete operations for simulations as hardware component combinations, associating each solution with a cost, and selecting the solution with the lowest cost as the hardware component combination for a final design of the integrated circuit.
    Type: Application
    Filed: October 23, 2012
    Publication date: February 21, 2013
    Inventors: Mustafa Ispir, Levent Oktem
  • Patent number: 8302054
    Abstract: Methods and apparatuses for retiming of multirate system for clock period minimization with a polynomial time without sub-optimality. In an embodiment, a normalized factor vector for the nodes of multirate graph is introduced, allowing the formulation of the multirate graph retiming constraints to a form similar to a single rate graph. In an aspect, the retiming constraints are formulated to allowed the usage of linear programming methodology instead of integer linear programming, thus significantly reducing the complexity of the solving algorithm. The present methodology also uses multirate constraints, avoiding unfolding to single rate equivalent, thus avoiding graph size increase. In a preferred embodiment, the parameters of the multirate system are normalized to the normalized factor vector, providing efficient algorithm in term of computational time and memory usage, without any sub-optimality.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: October 30, 2012
    Assignee: Synopsys, Inc.
    Inventors: Mustafa Ispir, Levent Oktem
  • Patent number: 8296713
    Abstract: A method and apparatus for synthesizing pipelined input/output in a circuit design from high level synthesis is described. In one example, an operation is selected to be performed by a circuit, the operation including a plurality of partial operations of different types. The partial operations are ordered based on the ordering of the variables. A plurality of hardware components for performing the operations are represented with a data flow graph having edges and nodes, the edges and nodes being connected based on the ordering of partial operations. A plurality of solutions are simulated for performing the operations as hardware component combinations represented as paths on the data flow graph. For each solution, a cost including a number of edges and nodes traversed on the data flow graph is determined, and a solution is selected with the lowest cost as a hardware component combination for a circuit.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: October 23, 2012
    Assignee: Synopsys, Inc.
    Inventor: Mustafa Ispir
  • Patent number: 8296712
    Abstract: A method and apparatus for improving the interconnection and multiplexing cost of circuit design from high level synthesis using ant colony optimization is described. In one example, a plurality of hardware components for performing an operation is represented with a data flow graph having edges and nodes. A plurality of solutions are simulated for performing the operation as hardware component and schedule combinations represented as paths on the data flow graph. For each solution, cost including a number of edges and nodes traversed on the data flow graph and an interconnection cost related to the number of different hardware components in the path is determined. A pheromone trail is associated with each path, the pheromone trail including a cost of the respective scheduling solution, and a solution is selected with the highest value pheromone trail as a hardware component and schedule combination for a circuit.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: October 23, 2012
    Assignee: Synopsys, Inc.
    Inventor: Mustafa Ispir
  • Patent number: 8296711
    Abstract: A method and apparatus for using entropy in ant colony optimization circuit design from high level synthesis is described. In one example, an operation to be performed by a circuit is selected. A plurality of hardware components for performing the operation are represented with a data flow graph having edges and nodes. A plurality of solutions for performing the operation are simulated as hardware component combinations represented as paths on the data flow graph. For each solution the cost including a number of edges and nodes traversed on the data flow graph and a supplemental sub-integer cost is determined and a solution is selected with the lowest cost as a hardware component combination for a circuit.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: October 23, 2012
    Assignee: Synopsys, Inc.
    Inventors: Mustafa Ispir, Levent Oktem
  • Publication number: 20120084742
    Abstract: A method and apparatus for using entropy in ant colony optimization circuit design from high level synthesis is described. In one example, an operation to be performed by a circuit is selected. A plurality of hardware components for performing the operation are represented with a data flow graph having edges and nodes. A plurality of solutions for performing the operation are simulated as hardware component combinations represented as paths on the data flow graph. For each solution the cost including a number of edges and nodes traversed on the data flow graph and a supplemental sub-integer cost is determined and a solution is selected with the lowest cost as a hardware component combination for a circuit.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Inventors: Mustafa Ispir, Levent Oktem
  • Publication number: 20120084743
    Abstract: A method and apparatus for improving the interconnection and multiplexing cost of circuit design from high level synthesis using ant colony optimization is described. In one example, a plurality of hardware components for performing an operation is represented with a data flow graph having edges and nodes. A plurality of solutions are simulated for performing the operation as hardware component and schedule combinations represented as paths on the data flow graph. For each solution, cost including a number of edges and nodes traversed on the data flow graph and an interconnection cost related to the number of different hardware components in the path is determined. A pheromone trail is associated with each path, the pheromone trail including a cost of the respective scheduling solution, and a solution is selected with the highest value pheromone trail as a hardware component and schedule combination for a circuit.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Inventor: Mustafa Ispir