Abstract: A system comprising a tool for providing actionable insight for bring up and performance debug of performant dataflow graphs on CGRA. A system comprising a tool for providing hierarchical traceable graph transformation of dataflow graph and annotated with runtime information after the compilation and execution back onto higher levels of stack from hardware metrics. A system comprising a tool for system performance monitoring and tuning by composition of compile time and runtime information of a workload dataflow graph on CGRA.

Abstract: This application provides an example method, an example system, and an example non-transitory computer-readable medium for training a graph neural network (GNN) for database driven place and route. One example method includes training a GNN to predict a nearest matching subgraph identifier and a nearest matching score using a plurality of features for each previously placed reference unit graph from a database of previously placed reference unit graphs, and to produce a trained GNN, receiving an unplaced unit graph, and determining a nearest matching subgraph identifier and a nearest matching score for the unplaced unit graph using the trained GNN. The example method also includes placing configurable units of the unplaced unit graph onto positions in a configurable units array according to placement position attributes corresponding to a nearest matching subgraph identified by the nearest matching subgraph identifier to produce placed configurable units of the unplaced unit graph.

Abstract: This application provides an example method, an example system, and an example non-transitory computer-readable medium for iterative database driven place and route. One example method includes adding an unplaced unit graph to a priority list, selecting a current subgraph of the unplaced unit graph from priority list, classifying the current subgraph of the unplaced unit graph against a database of previously placed reference unit graphs using a graph neural network to identify a nearest matching previously placed reference unit graph of the database, and determining a placed matching subgraph of the current subgraph of the unplaced unit graph from a placed matching subgraph of the nearest matching previously placed reference unit graph. The method also includes iteratively selecting, classifying, and determining, until the priority list is empty, and identifying a placement layout of configurable units of each placed matching subgraph of the unplaced unit graph onto a configurable units array.

Abstract: This application provides an example method, an example system, and an example non-transitory computer-readable medium for database driven place and route. One example method includes receiving an unplaced unit graph. The example method also includes classifying the unplaced unit graph against a database of previously placed reference unit graphs using a graph neural network (GNN) to identify a nearest matching previously placed reference unit graph of the database. The example method further includes placing configurable units of the unplaced unit graph onto positions in a configurable units array based on placement position attributes of at least a portion of configurable units of the nearest matching previously placed reference unit graph. The example method also includes generating configuration data that enables the configurable units array to execute at least a portion of the unplaced unit graph.

Abstract: A system and method to create a robust topology of a layout of cores for performing a function on an array of cores arranged in a grid is disclosed. A defective core file of location of defective cores in the array and an optimal ideal topology of a configuration layout of at least some of the cores is input. The location of at least one defective core of the array is determined. At least some of the cores in the array of cores are assigned to the optimal initial topography of cores in the array. It is determined whether at least one defective core is in the optimal initial topography. The functions of the cores in the row and the column of the at least one defective core are assigned to additional neighboring cores in the array of cores to create the robust topology.

Abstract: Reconfigurable dataflow architecture is an emerging design for deep learning training accelerator. This architecture maps model operators to an accelerator in a spatial way, enabling pipeline parallelization for high throughput. An essential ingredient to exploit this throughput advantage is compiler Performance Optimization (PO) which searches for optimal model mappings. The convention in industry-leading dataflow compilation uses hand-tuned rules to guide PO, requiring immense engineering cost to develop. This paper challenges this convention and asks if data-driven learned performance optimization can reduce the engineering cost while improving training throughput over hand-tuned rules. We present a workflow which guides PO using simple machine learning models trained from throughput observations of randomly generated mappings.

Abstract: A device may receive a floating-point function. The floating-point function may be a function described in a programming language that uses floating-point representation. The device may determine that fixed-point program code, associated with the floating-point function, is to be generated. The device may determine that the floating-point function is to be replaced with a replacement construct before the fixed-point program code is generated. The replacement construct may be described in the programming language and may be capable of conversion from the floating-point representation to a fixed-point representation. The device may determine parameters associated with generating the replacement construct. The parameters may be determined based on an evaluation of the floating-point function. The device may generate the replacement construct based on the parameters. The device may replace the floating-point function with the replacement construct.