Abstract: A digital circuit and a method for operating the same. The digital circuit includes (a) M×N regular cells electrically arranged in M rows and N columns, (b) N reference cells corresponding one-to-one to the N columns, and (c) N comparing circuits corresponding one-to-one to the N columns. Each regular cell is electrically coupled to a comparing circuit. Each reference cell is electrically coupled to the associated comparing circuit. Each regular cell includes a first tap node. Each reference cell includes P tap nodes. If a first voltage of the first tap node of a regular cell is between two voltages of two tap nodes of the P tap nodes of the associated reference cell, then the associated comparing circuit is capable of generating a first signal. If the first voltage is not between the two voltages, then the associated comparing circuit is capable of generating a second signal.

Abstract: The embodiments of the invention provide an apparatus, method, etc. for an efficient circuit and method to measure resistance. A sense line driver for an integrated circuit memory is provided, including a sense node that receives an experiment signal from an experiment structure. An output device is connected to the sense node, wherein the output device amplifies the experiment signal. Further, a voltage divider is connected to the sense node, wherein the voltage divider includes a first device and a second device. A sensing range is controlled by an operating width/resistance range and/or an adjust signal of the second device. The adjust signal changes a gate to source voltage of the second device and holds a constant voltage over multiple sensing instances. The sensing range is different for each of the sensing instances due to a change in the operating width of the second device.