Patents by Inventor Mutsuaki Kai

Mutsuaki Kai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7342434
    Abstract: A capacitor has a MOS gate structure in which a gate insulating film is held between a gate terminal and a ground terminal as a dielectric. A switch unit is connected between the gate terminal and a power supply. The ground terminal is connected to a ground. A switch control circuit that switches a state of the switch unit between a conductive state and a nonconductive state is provided. A predetermined voltage and a voltage of the gate terminal are input to a non-inverting input terminal and an inverting input terminal of the switch control circuit, respectively. The switch unit is conductive when the voltage of the gate terminal is higher than the predetermined voltage, and nonconductive when the voltage of the gate terminal is lower than the predetermined voltage.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: March 11, 2008
    Assignee: Fujitsu Limited
    Inventors: Shigetoshi Wakayama, Mutsuaki Kai
  • Publication number: 20070257371
    Abstract: A multilayer interconnection structure of a semiconductor device includes a first guard ring extending continuously along a periphery of a substrate and a second guard ring extending continuously in the multilayer interconnection structure along the periphery so as to be encircled by the first guard ring and so as to encircle an interconnection pattern inside the multilayer interconnection structure, wherein the first and second guard rings are connected with each other mechanically and continuously by a bridging conductor pattern extending continuously in a band form along a region including the first and second guard rings when viewed in the direction perpendicular to the substrate.
    Type: Application
    Filed: July 6, 2007
    Publication date: November 8, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Shigetoshi Wakayama, Mutsuaki Kai, Hiroyuki Kato, Masato Suga
  • Patent number: 7256474
    Abstract: A multilayer interconnection structure of a semiconductor device includes a first guard ring extending continuously along a periphery of a substrate and a second guard ring extending continuously in the multilayer interconnection structure along the periphery so as to be encircled by the first guard ring and so as to encircle an interconnection pattern inside the multilayer interconnection structure, wherein the first and second guard rings are connected with each other mechanically and continuously by a bridging conductor pattern extending continuously in a band form along a region including the first and second guard rings when viewed in the direction perpendicular to the substrate.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: August 14, 2007
    Assignee: Fujitsu Limited
    Inventors: Shigetoshi Wakayama, Mutsuaki Kai, Hiroyuki Kato, Masato Suga
  • Publication number: 20060061409
    Abstract: A capacitor has a MOS gate structure in which a gate insulating film is held between a gate terminal and a ground terminal as a dielectric. A switch unit is connected between the gate terminal and a power supply. The ground terminal is connected to a ground. A switch control circuit that switches a state of the switch unit between a conductive state and a nonconductive state is provided. A predetermined voltage and a voltage of the gate terminal are input to a non-inverting input terminal and an inverting input terminal of the switch control circuit, respectively. The switch unit is conductive when the voltage of the gate terminal is higher than the predetermined voltage, and nonconductive when the voltage of the gate terminal is lower than the predetermined voltage.
    Type: Application
    Filed: January 26, 2005
    Publication date: March 23, 2006
    Inventors: Shigetoshi Wakayama, Mutsuaki Kai
  • Publication number: 20040188843
    Abstract: A multilayer interconnection structure of a semiconductor device includes a first guard ring extending continuously along a periphery of a substrate and a second guard ring extending continuously in the multilayer interconnection structure along the periphery so as to be encircled by the first guard ring and so as to encircle an interconnection pattern inside the multilayer interconnection structure, wherein the first and second guard rings are connected with each other mechanically and continuously by a bridging conductor pattern extending continuously in a band form along a region including the first and second guard rings when viewed in the direction perpendicular to the substrate.
    Type: Application
    Filed: February 13, 2004
    Publication date: September 30, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Shigetoshi Wakayama, Mutsuaki Kai, Hiroyuki Kato, Masato Suga
  • Patent number: 6649428
    Abstract: Semiconductor chips mounted in a laminated manner on a substrate and a semiconductor integrated circuit device using the semiconductor chips. A predetermined semiconductor chip is selected by chip selection signals from an external unit despite the chips having the same wiring pattern are laminated in a plural number one upon the other. The semiconductor integrated circuit device is fabricated by using such semiconductor chips.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: November 18, 2003
    Assignee: Fujitsu Limited
    Inventor: Mutsuaki Kai
  • Publication number: 20030040131
    Abstract: Semiconductor chips mounted in a laminated manner on a substrate and a semiconductor integrated circuit device using the semiconductor chips. A predetermined semiconductor chip is selected by chip selection signals from an external unit despite the chips having the same wiring pattern are laminated in a plural number one upon the other. The semiconductor integrated circuit device is fabricated by using such semiconductor chips.
    Type: Application
    Filed: March 13, 2002
    Publication date: February 27, 2003
    Applicant: Fujitsu Limited
    Inventor: Mutsuaki Kai