Abstract: A semiconductor integrated circuit having a plurality of interconnect layers and at least one via connecting interconnects of two adjacent interconnect layers, wherein each interconnect layer has a plurality of first interconnect groups and second interconnect groups arranged respectively in a row and a column in a matrix. The first and the second interconnect groups are alternately arranged in each row and in each column of the matrix arranged facing each other between two adjacent interconnect layers. The first and second interconnect groups facing each other between the layers have crossing parts where they can be connected through vias.

Abstract: A semiconductor integrated circuit able to repair a defect of a circuit cell without greatly changing interconnects, that is, a semiconductor integrated circuit comprising a plurality of circuit cells aligned in a matrix and groups of interconnects connecting at least a part of the plurality of circuit cells other than one or more lines of unused circuit cells aligned in a row direction or a column direction.

Abstract: A portable terminal stores a first URL which specifies personal information of a user stored in a personal server, and transmits the first URL to a settlement device. The settlement device serves as a network access port for the portable terminal. The personal server is a server which manages personal data of the user that is identified by the first URL, and communicates with the settlement device and a service server via a network. The service server is a server for performing processing identified by a second URL. The service server executes the processing thereof by communicating with the settlement server and personal server via the network. Thus, the user can receive various types of services. Accordingly, a service providing system can be used with a portable terminal that does not hold any personal information therein.

Abstract: A graphics plotting apparatus which can realize both optimum division of a processing system into blocks and optimum arrangement of the blocks and can be augmented in terms of the performance for a three-dimensional graphics plotting process. The graphics plotting apparatus includes a logic circuit block and a memory block having a capacity sufficient to store display data to be displayed. Both blocks are built in the same chip. An input buffer having a capacity for more than one apex of a three-dimensional graphics plotting primitive is provided, and an interface for transfer of data to and from the outside and the input buffer are arranged on one side of the logic circuit block. A DDA setup circuit is arranged adjacent the input buffer, and a triangle DDA circuit is arranged adjacent the DDA setup circuit. A pair of texture processing circuit blocks are arranged adjacent the triangle DDA circuit.

Abstract: A graphics plotting apparatus which can realize both optimum division of a processing system into blocks and optimum arrangement of the blocks and can be augmented in terms of the performance for a three-dimensional graphics plotting process. The graphics plotting apparatus includes a logic circuit block and a memory block having a capacity sufficient to store display data to be displayed. Both blocks are built in the same chip. An input buffer having a capacity for more than one apex of a three-dimensional graphics plotting primitive is provided, and an interface for transfer of data to and from the outside and the input buffer are arranged on one side of the logic circuit block. A DDA setup circuit is arranged adjacent the input buffer, and a triangle DDA circuit is arranged adjacent the DDA setup circuit. A pair of texture processing circuit blocks are arranged adjacent the triangle DDA circuit.

Abstract: The present invention is intended to surely provide optimum information to users. A PK (Personal Key) stores PMDs (Personal Meta Data) that provide the information about each user. Of these PMDs, only those permitted for provision to a service system are transmitted to the service system by means of the quasi electrostatic field communication that is controlled by the range between the body of each user and an antenna. The service system receives the PMDs transmitted from the PK through the quasi electrostatic field communication. Further, on the basis of the received PMDs, the service system gets, from a content database, the content to be provided to each user and displays the obtained content onto an output device, thereby providing the content to each user. The present invention is applicable to a situated information presentation system, for example.

Abstract: A graphics plotting apparatus which can realize both optimum division of a processing system into blocks and optimum arrangement of the blocks and can be augmented in terms of the performance for a three-dimensional graphics plotting process. The graphics plotting apparatus includes a logic circuit block and a memory block having a capacity sufficient to store display data to be displayed. Both blocks are built in the same chip. An input buffer having a capacity for more than one apex of a three-dimensional graphics plotting primitive is provided, and an interface for transfer of data to and from the outside and the input buffer are arranged on one side of the logic circuit block. A DDA setup circuit is arranged adjacent the input buffer, and a triangle DDA circuit is arranged adjacent the DDA setup circuit. A pair of texture processing circuit blocks are arranged adjacent the triangle DDA circuit.

Abstract: An image processing apparatus capable of performing flexible, high speed processing, wherein a memory region emptied due to a change of display resolution can be used as a texture memory, increase of an overhead such as switching pages can be prevented, and a decline in the performance is not caused. A built-in DRAM inside a semiconductor chip has a configuration for storing display data and the texture data required by at least one graphic element. The texture data can be stored in portions other than the display regions, so the built-in DRAM can be used efficiently and an image processing apparatus achieving both high speed operation and a reduction of power consumption can be realized.

Abstract: A power supply controlling circuit by which further reduction of power consumption in a circuit can be achieved includes a clock controller. The clock controller detects a processing state of a module based on an amount of data stored in a FIFO memory. For example, when the load to the module is not very high, the clock controller continuously lowers the frequency of a system clock signal to be supplied to the module and continuously lowers the power supply voltage to the module.

Abstract: Instead of tracing using first rays of the ray tracing method, an object is divided into a plurality of triangles, each triangle is projected onto a screen, and data on a three-dimensional coordinate space are converted to data on a screen coordinate system. Pixel data inside a triangle are generated by interpolation based on data of the three vertices of the triangle on the screen coordinate system. Pixel data are corrected by performing a tracing operation using second rays on the pixel data generated by the interpolation.

Abstract: A portable terminal stores a first URL which specifies personal information of a user stored in a personal server, and transmits the first URL to a settlement device. The settlement device serves as a network access port for the portable terminal. The personal server is a server which manages personal data of the user that is identified by the first URL, and communicates with the settlement device and a service server via a network. The service server is a server for performing processing identified by a second URL. The service server executes the processing thereof by communicating with the settlement server and personal server via the network. Thus, the user can receive various types of services. Accordingly, a service providing system can be used with a portable terminal that does not hold any personal information therein.

Abstract: An image processing apparatus capable of performing flexible, high speed processing, wherein a memory region emptied due to a change of display resolution can be used as a texture memory, increase of an overhead such as switching pages can be prevented, and a decline in the performance is not caused. A built-in DRAM inside a semiconductor chip has a configuration for storing display data and the texture data required by at least one graphic element. The texture data can be stored in portions other than the display regions, so the built-in DRAM can be used efficiently and an image processing apparatus achieving both high speed operation and a reduction of power consumption can be realized.

Abstract: A graphics plotting apparatus which can realize both optimum division of a processing system into blocks and optimum arrangement of the blocks and can be augmented in terms of the performance for a three-dimensional graphics plotting process. The graphics plotting apparatus includes a logic circuit block and a memory block having a capacity sufficient to store display data to be displayed. Both blocks are built in the same chip. An input buffer having a capacity for more than one apex of a three-dimensional graphics plotting primitive is provided, and an interface for transfer of data to and from the outside and the input buffer are arranged on one side of the logic circuit block. A DDA setup circuit is arranged adjacent the input buffer, and a triangle DDA circuit is arranged adjacent the DDA setup circuit. A pair of texture processing circuit blocks are arranged adjacent the triangle DDA circuit.