Patents by Inventor Mutsumu Serizawa

Mutsumu Serizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5528631
    Abstract: A .pi./4 shifted DQPSK modulator includes a mapping/filtering circuit (6) equipped with a mapping function and filtering function. The mapping/filtering circuit (6) allows phase information which is obtained for each symbol to be shift-input to its shift register (61, 62, 63) and sequentially reads out filter-processed filter factor data corresponding to 256 samples initially stored in a factor memory circuit (7) and allows the filter factor data to be converted to numerical values based on position information corresponding to 10 symbols output in parallel manner from the shift register (61, 62, 63). According to this circuit (6), it is possible to obtain filtered mapping data MF. Therefore, the modulator has less number of gates of the filter and can be embodied with a very simplified compact circuit configuration.
    Type: Grant
    Filed: December 21, 1994
    Date of Patent: June 18, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahisa Hayashi, Tomohiro Matsuda, Mutsumu Serizawa
  • Patent number: 5450442
    Abstract: A digital radio telephone apparatus adaptively employs an equalizer for compensating for signal distortion of received signals. A switch may be provided at an output terminal of the equalizer so that the equalized signals are selectively applied to the decoder. The equalizer may be rendered to be operative when the quality of received radio frequency signals is lower than a prescribed level and rendered to be inoperative when the quality of received radio frequency signals is not lower than the prescribed level. The equalizer may be rendered to be inoperative for a predetermined time period from the time a digital speech radio link establishment operation is initiated. In the event that a radio link is established by TDMA (Time Division Multiple Access), the equalizer may be rendered to be operative in synchronization with a time slot assigned to the apparatus. The equalizer is not suppled with electric power or clock while the equalizer is rendered to be inoperative.
    Type: Grant
    Filed: November 1, 1991
    Date of Patent: September 12, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuji Umemoto, Shinichi Suizu, Kaoru Tatsumi, Mutsumu Serizawa
  • Patent number: 5444736
    Abstract: A radio communication apparatus comprises a detecting circuit for detecting a change of a received frequency of a radio communication channel during a communication and outputting a digital detection signal, a pulse width modulating circuit, and a smoothing circuit. The pulse width modulating circuit pulse-width modulates a pulse signal having a predetermined frequency in accordance with the digital detection signal output from the detecting circuit. The smoothing circuit smoothes the pulse-width modulated circuit output from the pulse width modulating circuit and generates an analog control signal. A transmission local oscillating frequency is controlled in accordance with the analog control signal.
    Type: Grant
    Filed: July 21, 1992
    Date of Patent: August 22, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Kawashima, Mutsumu Serizawa
  • Patent number: 5408698
    Abstract: A level changing circuit is provided in a reception signal path for a radio signal and a level detection circuit and a pulse width modulation circuit are provided in a gain control circuit. A level corresponding to the amplitude level of a signal processed by a digital demodulation circuit is detected by the level detection circuit and a pulse signal whose pulse width is modulated according to the detected signal level is generated from the pulse width modulation circuit. Then, a gain control signal having a D.C. level corresponding to the pulse signal is generated and the gain of the level changing circuit is controlled according to the gain control signal, thereby making it possible to control the level of the received signal.
    Type: Grant
    Filed: March 25, 1992
    Date of Patent: April 18, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Kazuhiro Kawashima
  • Patent number: 5311523
    Abstract: A carrier phase synchronous type maximum likelihood decoder for estimating a maximum likelihood sequence of data sequence includes N memories for memorizing N partial series of data sequence; N carrier phase adjust loop, each provided correspondingly to N memories, each for adjusting a carrier phase of received data series on the basis of a partial series memorized in corresponding memory; N likelihood function calculate parts, each provided correspondingly to N memories and N carrier phase adjust parts, each for calculating likelihoods of partial series by utilizing partial series memorized in corresponding memory and an output of corresponding carrier phase adjust loop, a compare and modulation part for comparing N calculated likelihoods and for selecting partial series having a maximum likelihood from memory, thereby, the satisfactory operation in the low S/N ratio can be realized and the satisfactory phase tracking characteristics can be obtained.
    Type: Grant
    Filed: December 6, 1989
    Date of Patent: May 10, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Junzo Murakami
  • Patent number: 5287388
    Abstract: A frequency-offset removal apparatus comprises a receiving section for receiving a signal including a training sequence, a local oscillator for generating an oscillating signal to synchronize with the received signal, a frequency sweeping section for sweeping the frequency of the oscillating signal through a specific frequency which is identical with the carrier frequency of the received signal, a frequency shifting section for shifting the carrier frequency of the received signal by each oscillating signal, a selector for selecting one specific frequency-shifted-signal having the nearest frequency to the specific frequency from the frequency-shifted-signals generated in the frequency shifting section, and a frequency adjusting circuit for adjusting the frequency of the oscillating signal to generate a specific oscillating signal which produces the specific frequency-shifted-signal after shifting by the received signal.
    Type: Grant
    Filed: June 25, 1991
    Date of Patent: February 15, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Ogura, Mutsumu Serizawa
  • Patent number: 5283531
    Abstract: A demodulation apparatus incorporating an adaptive equalizer, capable of realizing a highly reliable communication, lower power consumption, and a compact size. In the demodulation apparatus, an output of one of two demodulators, at least one of which including an equalizer, is selected according to a presence or absence of multipath which is determined from a non-coincidence of bit codes, eye apertures, bit error ratea, or a matched filter output, while the operation of the other demodulator is stopped for reduction of power consumption, by stopping a supply of power or clock signals to the other demodulator. In a case using a frequency offset detection unit and a frequency offset memory, one of these is selected according to a convergence or divergence of an error signal from an equalizer, while the operation of the other one is stopped for reduction of power consumption.
    Type: Grant
    Filed: May 24, 1993
    Date of Patent: February 1, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Minoru Namekata, Koji Ogura, Katsumi Sakakibara
  • Patent number: 5274670
    Abstract: A method of equalization in a digital mobile communication capable of realizing an improved tracking of the variations of the transmission path characteristics, such that it becomes possible to achieve the good error rate characteristic. In the method, the forward and backward equalizations are carried out, while the forward and backward evaluation functions indicating reliabilites of the forward and backward equalizations are calculated by using the signal sequence, and a final equalization output is obtained by selecting for each bit of the signal sequence one of the forward and backward equalization outputs for which the reliability indicated by corresponding one of the forward and backward evaluation functions is higher as final equalization output for each bit. The detection of an abnormal state such as a sudden drop of a signal strength of the signal sequence or a limit cycle state of an equalizer may be used instead of the evaluation functions.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: December 28, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Minoru Namekata
  • Patent number: 5214391
    Abstract: A demodulation apparatus incorporating an adaptive equalizer, capable of realizing a highly reliable communication, lower power consumption, and a compact size. In the demodulation apparatus, an output of one of two demodulators, at least one of which including an equalizer, is selected according to a presence or absence of multipath which is determined from a non-coincidence of bit codes, eye apertures, bit error rates, or a matched filter output, while the operation of the other demodulator is stopped for reduction of power consumption, by stopping a supply of power or clock signals to the other demodulator. In a case using a frequency offset detection unit and a frequency offset memory, one of these is selected according to a convergence or divergence of an error signal from an equalizer, while the operation of the other one is stopped for reduction of power consumption.
    Type: Grant
    Filed: June 29, 1992
    Date of Patent: May 25, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Minoru Namekata, Koji Ogura, Katsumi Sakakibara
  • Patent number: 5203027
    Abstract: Diversity receiver having many diversity branches comprises adaptive equalization sections for equalizing the training signal sampled on the basis of adjustable tap coefficients, and adjusting the tap coefficient every code element in the training signal so as to minimize the intensity of an error signal defined by the difference between the equalized training signal and the already-known training signal, error signal intensity detecting sections for detecting the intensity of the error signal every code element, a switching section for switching to a diversity branch having the minimum signal intensity of error signals in the respective diversity branches.
    Type: Grant
    Filed: November 27, 1990
    Date of Patent: April 13, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuya Nounin, Katsumi Sakakibara, Mutsumu Serizawa, Koji Ogura
  • Patent number: 5159282
    Abstract: A demodulation apparatus incorporating an adaptive equalizer, capable of realizing a highly reliable communication, lower power consumption, and a compact size. In the demodulation apparatus, an output of one of two demodulators, at least one of which including an equalizer, is selected according to a presence or absence of multipath which is determined from a non-coincidence of bit codes, eye apertures, bit error rates, or a matched filter output, while the operation of the other demodulator is stopped for reduction of power consumption, by stopping a supply of power or clock signals to the other demodulator. In a case using a frequency offset detection unit and a frequency offset memory, one of these is selected according to a convergence or divergence of an error signal from an equalizer, while the operation of the other one is stopped for reduction of power consumption.
    Type: Grant
    Filed: December 6, 1990
    Date of Patent: October 27, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mutsumu Serizawa, Minoru Namekata, Koji Ogura, Katsumi Sakakibara
  • Patent number: 4990867
    Abstract: In a modulator for converting two digital signals of I channel and Q channel in base band into analog signals and for converting a component of the signals whose phase is the same as a carrier and another component of the signals whose phase is orthogonal to the carrier so as to produce an orthogonally modulated wave, the two digital signals are connected to one signal train by time-sharing and multiplexing them and the converted analog signals are separated to two analog signals for the I channel and the Q channel and thereby a digital modulator can be structured by using only one digital/analog converter resulting in reducing the adjustment points and the production cost.
    Type: Grant
    Filed: May 10, 1990
    Date of Patent: February 5, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Ogura, Mutsumu Serizawa