Patents by Inventor Mutsuya Motojima

Mutsuya Motojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210242318
    Abstract: A semiconductor device includes a semiconductor layer, a source region, a drain region, a gate electrode, a first electrode, and a second electrode. The semiconductor layer has a main surface. The semiconductor layer generates a channel close to the main surface along one direction of the main surface. The source region and the drain region are disposed in a surface layer of the semiconductor layer. A portion where the channel is generated is disposed between the source region and the drain region. The gate electrode is disposed above the channel and along the one direction. The first electrode is connected to a region of the main surface corresponding to the source region. The second electrode is connected to a region of the main surface corresponding to the drain region.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 5, 2021
    Inventor: Mutsuya MOTOJIMA
  • Patent number: 10777545
    Abstract: A semiconductor device configures a protection element that protects a protection target element connected between a cathode electrode and an anode electrode when a parasitic transistor configured by a cathode region, a first conductivity type well layer, and a second conductivity type well is turned on and electrical continuity is established between the cathode electrode and the anode electrode. The semiconductor device includes a plurality of body regions in one cell of the protection element, and the plurality of body regions is brought in contact with the cathode electrode.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: September 15, 2020
    Assignee: DENSO CORPORATION
    Inventors: Akira Yamada, Shinya Sakurai, Takashi Nakano, Yosuke Kondo, Mutsuya Motojima
  • Patent number: 10573402
    Abstract: A semiconductor apparatus includes a nonvolatile memory therein and an input terminal configured to receive a test control signal and an input signal of a writing/erasing voltage from an external device. The semiconductor apparatus includes: an output terminal; a positive pulse detection circuit configured to detect a positive test control signal, and output the positive test control signal to the output terminal; and a negative pulse detection circuit configured to detect a negative test control signal, and output the negative test control signal to the output terminal after inverting.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: February 25, 2020
    Assignee: DENSO CORPORATION
    Inventor: Mutsuya Motojima
  • Publication number: 20190237457
    Abstract: A semiconductor device configures a protection element that protects a protection target element connected between a cathode electrode and an anode electrode when a parasitic transistor configured by a cathode region, a first conductivity type well layer, and a second conductivity type well is turned on and electrical continuity is established between the cathode electrode and the anode electrode. The semiconductor device includes a plurality of body regions in one cell of the protection element, and the plurality of body regions is brought in contact with the cathode electrode.
    Type: Application
    Filed: April 8, 2019
    Publication date: August 1, 2019
    Inventors: Akira YAMADA, Shinya SAKURAI, Takashi NAKANO, Yosuke KONDO, Mutsuya MOTOJIMA
  • Publication number: 20190147970
    Abstract: A semiconductor apparatus includes a nonvolatile memory therein and an input terminal configured to receive a test control signal and an input signal of a writing/erasing voltage from an external device. The semiconductor apparatus includes: an output terminal; a positive pulse detection circuit configured to detect a positive test control signal, and output the positive test control signal to the output terminal; and a negative pulse detection circuit configured to detect a negative test control signal, and output the negative test control signal to the output terminal after inverting.
    Type: Application
    Filed: January 17, 2019
    Publication date: May 16, 2019
    Inventor: Mutsuya MOTOJIMA
  • Patent number: 9601987
    Abstract: In a power supply apparatus, power is transmitted from its input terminal to its output terminal. The transmitted power is controlled so that an output voltage detected in a predetermined ratio can be equal to a reference voltage. A reduction signal is outputted when the output voltage decreases below a threshold. A presence or absence of an abnormality in a capacitance connected to the output terminal or a load current in a load connected to the output terminal is determined, when the output voltage is equal to the target voltage, by changing at least one of the detection ratio and the reference voltage so that the output voltage can transition from a target voltage higher than the threshold toward a middle voltage lower than the threshold only during a predetermined time period.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: March 21, 2017
    Assignee: DENSO CORPORATION
    Inventors: Mutsuya Motojima, Takeshi Morinaga
  • Publication number: 20160313178
    Abstract: A semiconductor device includes light receiving elements, selection switches, a light receiving circuit and a control circuit. Each light receiving element receives a light and outputs a detection signal according to an intensity of the light. The selection switches are correspondingly provided for the light receiving elements. Each selection switch selectively allows the detection signal to be outputted. The light receiving circuit includes a capacitive coupling element and an amplifying circuit. The light receiving circuit is provided for a prescribed number of the light receiving elements and connected to the light receiving elements through the selection switches. The control circuit switches the selection switches sequentially so that the detection signals of the light receiving elements are received in the light receiving circuit through the capacitive coupling element.
    Type: Application
    Filed: April 15, 2016
    Publication date: October 27, 2016
    Inventor: Mutsuya MOTOJIMA
  • Publication number: 20150180326
    Abstract: In a power supply apparatus, power is transmitted from its input terminal to its output terminal. The transmitted power is controlled so that an output voltage detected in a predetermined ratio can be equal to a reference voltage. A reduction signal is outputted when the output voltage decreases below a threshold. A presence or absence of an abnormality in a capacitance connected to the output terminal or a load current in a load connected to the output terminal is determined, when the output voltage is equal to the target voltage, by changing at least one of the detection ratio and the reference voltage so that the output voltage can transition from a target voltage higher than the threshold toward a middle voltage lower than the threshold only during a predetermined time period.
    Type: Application
    Filed: November 7, 2014
    Publication date: June 25, 2015
    Inventors: Mutsuya MOTOJIMA, Takeshi MORINAGA
  • Patent number: 8319611
    Abstract: An ID tag has a stable internal supply voltage and extends the range of communication with the reader/writer during back scattering communication. An ASK-modulated signal pre-boost circuit to which antenna terminals are coupled is coupled in parallel with a rectifying circuit. In the ASK-modulated signal pre-boost circuit, a switch for back scattering, working as a modulator element, is provided. During back scattering communication, when a back scattering signal “1” is transmitted, only the current flowing in the signal receiving path of the modulation/demodulation unit is wasted by turning the switch for back scattering on. Additional current loss other than the loss for impedance matching can be prevented.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: November 27, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Takayuki Tsukamoto, Mutsuya Motojima
  • Publication number: 20090134979
    Abstract: The disclosed ID tag has a stable internal supply voltage and extends the range of communication with the reader/writer during back scattering communication. An ASK-modulated signal pre-boost circuit to which antenna terminals are coupled is coupled in parallel with a rectifying circuit. In the ASK-modulated signal pre-boost circuit, a switch for back scattering, working as a modulator element, is provided. During back scattering communication, when a back scattering signal “1” is transmitted, only the current flowing in the signal receiving path of the modulation/demodulation unit is wasted by turning the switch for back scattering on. Additional current loss other than the loss for impedance matching can be prevented.
    Type: Application
    Filed: October 3, 2008
    Publication date: May 28, 2009
    Inventors: Takayuki TSUKAMOTO, Mutsuya MOTOJIMA