Patents by Inventor Myeong-Iyong Ko

Myeong-Iyong Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Delay locked loop with multi-phases
    Patent number: 6667643
    Abstract: A delay locked loop circuit includes a delay unit for receiving an input clock signal, generating an output clock signal whose phase lags that of the input clock signal, and generating multiple delay signals having differently delayed phases in response to the input clock signal; a harmonic lock preventing unit for receiving the input clock signal and the multiple delay signals, outputting a 1st signal and a 2nd signal, comparing the phases of the input clock signal and the multiple delay signals, and generating the 1st signal or the 2nd signal depending on the comparison result; an electric charge pump for receiving the 1st signal and the 2nd signal, generating a phase control signal, and making the voltage of the phase control signal higher or lower than a pre-defined voltage in response to the 1st signal and the 2nd signal; a filter for eliminating AC included in the phase control signal and transmitting the filtered signal to the delay unit; and start-up circuits for feeding a 1st voltage to the electric
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: December 23, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Myeong-Iyong Ko
  • Delay locked loop with multi-phases
    Publication number: 20030076142
    Abstract: A delay locked loop circuit includes a delay unit for receiving an input clock signal, generating an output clock signal whose phase lags that of the input clock signal, and generating multiple delay signals having differently delayed phases in response to the input clock signal; a harmonic lock preventing unit for receiving the input clock signal and the multiple delay signals, outputting a 1st signal and a 2nd signal, comparing the phases of the input clock signal and the multiple delay signals, and generating the 1st signal or the 2nd signal depending on the comparison result; an electric charge pump for receiving the 1st signal and the 2nd signal, generating a phase control signal, and making the voltage of the phase control signal higher or lower than a pre-defined voltage in response to the 1st signal and the 2nd signal; a filter for eliminating AC included in the phase control signal and transmitting the filtered signal to the delay unit; and start-up circuits for feeding a 1st voltage to the electric
    Type: Application
    Filed: September 27, 2002
    Publication date: April 24, 2003
    Inventor: Myeong-Iyong Ko