Abstract: A liquid crystal display having data driving apparatus comprising first and second output switches, a charge sharing line, and first and second charge sharing switches. The first output switch switches an electrical connection between a first amplifier providing a positive gradation voltage and a first data line in response to a control signal. The second output switch switches an electrical connection between a second amplifier providing a negative gradation voltage and a second data line in response to the control signal. The first charge sharing switch switches an electrical connection between the first data line and the charge sharing line in response to the control signal. The second charge sharing switch switches an electrical connection between the second data line and the charge sharing line in response to the control signal.

Abstract: A liquid crystal display having data driving apparatus comprising first and second output switches, a charge sharing line, and first and second charge sharing switches. The first output switch switches an electrical connection between a first amplifier providing a positive gradation voltage and a first data line in response to a control signal. The second output switch switches an electrical connection between a second amplifier providing a negative gradation voltage and a second data line in response to the control signal. The first charge sharing switch switches an electrical connection between the first data line and the charge sharing line in response to the control signal. The second charge sharing switch switches an electrical connection between the second data line and the charge sharing line in response to the control signal.

Abstract: A signal generating circuit for a liquid crystal display (LCD) includes circuitry adapted to receive a gate clock signal and an output enable signal. The gate clock signal is a combination of a gate-on signal and a gate-off signal and the output enable signal is operable to adjust the width of the gate-on signal. The signal generating circuit adjusts the output enable signal such that a falling edge of the output enable signal overlaps a rising edge of the gate clock signal and thereby delays the gate clock signal for a selected amount of time.

Abstract: A liquid crystal display (LCD) includes a plurality of gate line drivers that are to be sequentially activated during a display frame in response to an input vertical synchronization start signal having a predefined waveform. However, during shift of display mode it is possible that the vertical synchronization start signal will be asserted more then once in a frame and cause a problem. The LCD includes an error detecting and blocking unit which detects when the vertical synchronization start signal is asserted more then once in a frame and blocks the second assertion from being passed forward during the one frame so as to erroneously reactivate the plurality of gate line drivers a second time during the same frame.

Abstract: A signal transfer member for a liquid crystal display (LCD) apparatus includes a power line for receiving power from an external source and for driving a semiconductor chip disposed on the transfer member or the display apparatus. The power line is bent so as to incorporate a serpentine structure, which enables the length of the power line to be easily adjusted and results in the line being longer than a power line formed with a relatively straight structure. Accordingly, the length of the power line can be adjusted to take into account the respective impedances of the chip and the external source so as to suppress electromagnetic waves in the power line. This prevents the creation of noise, distortion of signals, damage to the semiconductor chip, and disconnection of the input interconnection thereof that are caused by the electromagnetic waves, so that product yields are thereby improved.

Abstract: In accordance with one or more embodiments of the present disclosure, a touch screen display device includes a touch screen display panel, a first integrated circuit (IC) chip, and a second IC chip. The touch screen display panel includes a plurality of gate lines, a plurality of data lines, a plurality of pixels, a plurality of first sensing lines, a plurality of second sensing lines, and a plurality of touch sensors. The first IC chip includes a gate driver which transmits a plurality of gate signals to the gate lines, respectively, and a first read-out unit which receives respective output signals of the first sensing lines. The second IC chip includes a data driver which applies a plurality of image data voltages to the data lines, respectively, and a second read-out unit which receives respective output signals of the second sensing lines.

Abstract: A liquid crystal display (LCD) includes a plurality of gate line drivers that are to be sequentially activated during a display frame in response to an input vertical synchronization start signal having a predefined waveform. However, during shift of display mode it is possible that the vertical synchronization start signal will be asserted more then once in a frame and cause a problem. The LCD includes an error detecting and blocking unit which detects when the vertical synchronization start signal is asserted more then once in a frame and blocks the second assertion from being passed forward during the one frame so as to erroneously reactivate the plurality of gate line drivers a second time during the same frame.

Abstract: A gate-driving circuit operating in a stable manner even when simultaneously driving a plurality of gate lines at high levels is provided. The gate-driving circuit includes a shift register that receives a gate clock signal and scanning start signal and/or a mode signal and sequentially provides a plurality of pre-gate signals in synchronization with the gate clock signal, an operation section that receives the gate clock signal and the plurality of pre-gate signals and performs operations on the plurality of pre-gate signals which includes sequentially outputting a plurality of operation signals and a selector receives the plurality of pre-gate signals and the plurality of operation signals and selectively outputs the plurality of pre-gate signals or the plurality of operation signals in response to receipt of the mode signal.

Abstract: A liquid crystal display having data driving apparatus comprising first and second output switches, a charge sharing line, and first and second charge sharing switches. The first output switch switches an electrical connection between a first amplifier providing a positive gradation voltage and a first data line in response to a control signal. The second output switch switches an electrical connection between a second amplifier providing a negative gradation voltage and a second data line in response to the control signal. The first charge sharing switch switches an electrical connection between the first data line and the charge sharing line in response to the control signal. The second charge sharing switch switches an electrical connection between the second data line and the charge sharing line in response to the control signal.

Abstract: A display device and a method for driving the same wherein the timing of the gate clock signal, which is an output of a timing controller, is changed to a time before a data latch signal is applied, so that degradation of the image due to gate noise can be prevented. That is, a gate turn-on voltage is applied before the data latch signal to turn on thin film transistors in an interval in which a gate turn-off voltage is stabilized. Accordingly, the generation of horizontal streaks in the lower portion of the display device is prevented.

Abstract: A signal transfer member for a liquid crystal display (LCD) apparatus includes a power line for receiving power from an external source and for driving a semiconductor chip disposed on the transfer member or the display apparatus. The power line is bent so as to incorporate a serpentine structure, which enables the length of the power line to be easily adjusted and results in the line being longer than a power line formed with a relatively straight structure. Accordingly, the length of the power line can be adjusted to take into account the respective impedances of the chip and the external source so as to suppress electromagnetic waves in the power line. This prevents the creation of noise, distortion of signals, damage to the semiconductor chip, and disconnection of the input interconnection thereof that are caused by the electromagnetic waves, so that product yields are thereby improved.

Abstract: A signal generating circuit for a liquid crystal display (LCD) includes circuitry adapted to receive a gate clock signal and an output enable signal. The gate clock signal is a combination of a gate-on signal and a gate-off signal and the output enable signal is operable to adjust the width of the gate-on signal. The signal generating circuit adjusts the output enable signal such that a falling edge of the output enable signal overlaps a rising edge of the gate clock signal and thereby delays the gate clock signal for a selected amount of time.