Patents by Inventor Myoung-Sik Chang

Myoung-Sik Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145527
    Abstract: A method for fabricating a semiconductor device includes: forming a mold structure including a mold layer and a supporter layer over a semiconductor substrate; forming an opening penetrating the mold structure; forming a protective layer on a bottom surface and a sidewall of the opening; forming a lower electrode over the protective layer; selectively etching the supporter layer to form a supporter that supports the lower electrode; removing the mold layer to define a non-exposed portion and an exposed portion of an outer wall of the protective layer; and selectively trimming the exposed portion of the protective layer to form a protective layer pattern between the supporter and the lower electrode.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Inventors: Jun Hyuk SEO, Myoung Sik CHANG
  • Patent number: 11901403
    Abstract: A method for fabricating a semiconductor device includes: forming a mold structure including a mold layer and a supporter layer over a semiconductor substrate; forming an opening penetrating the mold structure; forming a protective layer on a bottom surface and a sidewall of the opening; forming a lower electrode over the protective layer; selectively etching the supporter layer to form a supporter that supports the lower electrode; removing the mold layer to define a non-exposed portion and an exposed portion of an outer wall of the protective layer; and selectively trimming the exposed portion of the protective layer to form a protective layer pattern between the supporter and the lower electrode.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: February 13, 2024
    Assignee: SK hynix Inc.
    Inventors: Jun Hyuk Seo, Myoung Sik Chang
  • Publication number: 20220415028
    Abstract: A method for fabricating a semiconductor device includes: forming a mold structure including a mold layer and a supporter layer over a semiconductor substrate; forming an opening penetrating the mold structure; forming a protective layer on a bottom surface and a sidewall of the opening; forming a lower electrode over the protective layer; selectively etching the supporter layer to form a supporter that supports the lower electrode; removing the mold layer to define a non-exposed portion and an exposed portion of an outer wall of the protective layer; and selectively trimming the exposed portion of the protective layer to form a protective layer pattern between the supporter and the lower electrode.
    Type: Application
    Filed: August 30, 2022
    Publication date: December 29, 2022
    Inventors: Jun Hyuk SEO, Myoung Sik CHANG
  • Patent number: 11456352
    Abstract: A method for fabricating a semiconductor device includes: forming a mold structure including a mold layer and a supporter layer over a semiconductor substrate; forming an opening penetrating the mold structure; forming a protective layer on a bottom surface and a sidewall of the opening; forming a lower electrode over the protective layer; selectively etching the supporter layer to form a supporter that supports the lower electrode; removing the mold layer to define a non-exposed portion and an exposed portion of an outer wall of the protective layer; and selectively trimming the exposed portion of the protective layer to form a protective layer pattern between the supporter and the lower electrode.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: September 27, 2022
    Assignee: SK hynix Inc.
    Inventors: Jun Hyuk Seo, Myoung Sik Chang
  • Publication number: 20210408225
    Abstract: A method for fabricating a semiconductor device includes: forming a mold structure including a mold layer and a supporter layer over a semiconductor substrate; forming an opening penetrating the mold structure; forming a protective layer on a bottom surface and a sidewall of the opening; forming a lower electrode over the protective layer; selectively etching the supporter layer to form a supporter that supports the lower electrode; removing the mold layer to define a non-exposed portion and an exposed portion of an outer wall of the protective layer; and selectively trimming the exposed portion of the protective layer to form a protective layer pattern between the supporter and the lower electrode.
    Type: Application
    Filed: January 26, 2021
    Publication date: December 30, 2021
    Inventors: Jun Hyuk SEO, Myoung Sik CHANG
  • Patent number: 6306689
    Abstract: An anti-fuse for programming a redundancy cell and a repair circuit having a programming apparatus are disclosed.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: October 23, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Mi-Ran Kim, Myoung-Sik Chang, Jin-Kook Kim