Abstract: A flat panel driver includes a shift register that receives a control signal input from an external device in synchronization with a clock signal, adds/subtracts a predetermined pulse width to/from the pulse width of the control signal and, when a predetermined function of the driver is completed, outputs the control signal having the adjusted pulse width such that the driver can recognize its location in the flat panel through input/output signals and the driving characteristic of the driver can be varied to optimize the performance of the driver.