Abstract: A semiconductor device includes an active pattern on a substrate extending in a first horizontal direction, a gate electrode on the active pattern extending in a second horizontal direction, a source/drain region on the active pattern, an upper source/drain region apart from the lower source/drain region, a lower source/drain between upper and lower source/drain regions and connected to the lower source/drain region, an upper source/drain connected to an upper source/drain region, an interlayer insulating layer surrounding the upper source/drain region, a through-via on opposing sidewalls in the second horizontal direction extending through the interlayer insulating layer in the vertical direction, the through-via being spaced from the upper source/drain region and upper source/drain contact in the second horizontal direction, the through-via being connected to the lower source/drain contact, and a dam structure on each of the opposing sidewalls in the horizontal direction of the upper source/drain region.

Abstract: A cathode for a lithium secondary battery includes a cathode current collector, and a cathode active material layer formed on the cathode current collector. The cathode active material layer includes cathode active material particles. The cathode active material particles include a lithium metal oxide particle containing nickel and having a mole fraction of cobalt of 0.02 or less among all elements except lithium and oxygen.

Abstract: A nonvolatile memory device includes a memory cell region including first metal pads, and a peripheral circuit region. The peripheral circuit region includes second metal pads, a signal storage circuit that stores control signals and a data signal received from external of the nonvolatile memory device, a debugging information generator that generates debugging information based on the stored control signals and the stored data signal, and a debugging information register that outputs the debugging information in response to a debugging information external of the nonvolatile memory device. The peripheral circuit region is vertically connected to the memory cell region by the first metal pads and the second metal pads.

Abstract: Proposed is a cover structure with a double cover structure and a shooting case of munition having the same. The cover structure with a double cover structure includes: a shooting case main body having an inner space with an open upper side; a cover member seated on the open upper side of the shooting case main body to seal the open upper side; and a cover fixing member coupled to the shooting case main body to fix a position of the cover member, so that the position of the cover member is strongly fixed while simplifying a structure by the double cover structure to increase an internal pressure of the shooting case, thereby increasing a range of munition and maintaining performance of munition.

Abstract: A nonvolatile memory device includes a memory cell region including first metal pads, and a peripheral circuit region. The peripheral circuit region includes second metal pads, a signal storage circuit that stores control signals and a data signal received from external of the nonvolatile memory device, a debugging information generator that generates debugging information based on the stored control signals and the stored data signal, and a debugging information register that outputs the debugging information in response to a debugging information external of the nonvolatile memory device. The peripheral circuit region is vertically connected to the memory cell region by the first metal pads and the second metal pads.

Abstract: An operation method of a nonvolatile memory device includes receiving control signals and a data signal from external of the nonvolatile memory device, generating debugging information based on the control signals and the data signal, receiving a debugging information request from external of the nonvolatile memory device, and outputting the debugging information in response to the debugging information request.

Abstract: A read method of a nonvolatile memory device includes reading data from a selected memory area of the nonvolatile memory device according to a first read voltage; detecting and correcting an error of the read data; and deciding a second read voltage for reading the selected memory area when an error of the read data is uncorrectable. The second read voltage is decided according to either the number of logical 0s or 1s included in the read data, or a ratio of logical 1s to logical 0s in the read data.

Abstract: An operation method of a nonvolatile memory device includes receiving control signals and a data signal from external of the nonvolatile memory device, generating debugging information based on the control signals and the data signal, receiving a debugging information request from external of the nonvolatile memory device, and outputting the debugging information in response to the debugging information request.

Abstract: Provided is a smart raw cotton total management system and more particularly, a smart raw cotton total management system which promotes efficiency of raw cotton management by providing a variety of evaluation information on the raw cotton purchased by the member to the member side and totally manages a raw cotton member and a raw cotton supplier by providing purchase prior information to the member when requesting the raw cotton purchase of the member to perform reasonable raw cotton purchase and transaction.

Abstract: A nonvolatile memory device includes a memory cell array having memory cells, a row decoder circuit connected to the memory cells through word lines, a page buffer circuit connected to the memory cells through bit lines, and a control circuit controlling the row decoder circuit and the page buffer circuit to repeatedly perform an erase loop including an erase and an erase verification with respect to the memory cells. The control circuit is configured to select one of an increase and a decrease of an erase voltage according to a result of the erase verification of a current erase loop and apply the controlled erase voltage to the memory cells in the erase operation of a subsequent erase loop.

Abstract: A nonvolatile memory device includes a memory cell array having memory cells, a row decoder circuit connected to the memory cells through word lines, a page buffer circuit connected to the memory cells through bit lines, and a control circuit controlling the row decoder circuit and the page buffer circuit to repeatedly perform an erase loop including an erase and an erase verification with respect to the memory cells. The control circuit is configured to select one of an increase and a decrease of an erase voltage according to a result of the erase verification of a current erase loop and apply the controlled erase voltage to the memory cells in the erase operation of a subsequent erase loop.

Abstract: A nonvolatile memory device includes a memory cell array having memory cells, a row decoder circuit connected to the memory cells through word lines, a page buffer circuit connected to the memory cells through bit lines, and a control circuit controlling the row decoder circuit and the page buffer circuit to repeatedly perform an erase loop including an erase and an erase verification with respect to the memory cells. The control circuit is configured to select one of an increase and a decrease of an erase voltage according to a result of the erase verification of a current erase loop and apply the controlled erase voltage to the memory cells in the erase operation of a subsequent erase loop.

Abstract: A memory device includes a memory cell array having a plurality of memory cells, and a page buffer unit including a plurality of page buffers configured to store a plurality of pieces of data sequentially read from some of the plurality of memory cells at different read voltage levels, respectively, and to perform a logic operation on the plurality of pieces of data, respectively. The memory device further includes a counting unit configured to count the number of memory cells that exist in each of a plurality of sections defined by the different read voltage levels, based on results of the logic operation.

Abstract: Provided is a method of operating a non-volatile memory device including a plurality of strings, each string including a plurality of memory cells vertically stacked on a substrate. The method includes performing an erase operation on memory cells corresponding to a plurality of string selection lines, performing an erase verification operation on first strings connected to a first string selection line from among the plurality of string selection lines, storing fail column information corresponding to a first fail string, which is erase-failed, from among the first strings, and performing an erase verification operation on second strings connected to a second string selection line from among the plurality of string selection lines, when the first strings are erase-passed.

Abstract: A nonvolatile memory device includes a memory cell array having memory cells, a row decoder circuit connected to the memory cells through word lines, a page buffer circuit connected to the memory cells through bit lines, and a control circuit controlling the row decoder circuit and the page buffer circuit to repeatedly perform an erase loop including an erase and an erase verification with respect to the memory cells. The control circuit is configured to select one of an increase and a decrease of an erase voltage according to a result of the erase verification of a current erase loop and apply the controlled erase voltage to the memory cells in the erase operation of a subsequent erase loop.

Abstract: A non-volatile memory device receives a start command through a command line, receives an address through an address line, receives at least one setting value through the address line, receives a confirm command corresponding to the start command through the command line, sets at least one parameter of the non-volatile memory device as the setting value based on the start command, a number of the setting value, and the confirm command, and executes an operation that corresponds to the start command, on a memory cell that corresponds to the address, based on the set parameter.

Abstract: Provided is a method of operating a non-volatile memory device including a plurality of strings, each string including a plurality of memory cells vertically stacked on a substrate. The method includes performing an erase operation on memory cells corresponding to a plurality of string selection lines, performing an erase verification operation on first strings connected to a first string selection line from among the plurality of string selection lines, storing fail column information corresponding to a first fail string, which is erase-failed, from among the first strings, and performing an erase verification operation on second strings connected to a second string selection line from among the plurality of string selection lines, when the first strings are erase-passed.

Abstract: A non-volatile memory device receives a start command through a command line, receives an address through an address line, receives at least one setting value through the address line, receives a confirm command corresponding to the start command through the command line, sets at least one parameter of the non-volatile memory device as the setting value based on the start command, a number of the setting value, and the confirm command, and executes an operation that corresponds to the start command, on a memory cell that corresponds to the address, based on the set parameter.

Abstract: A non-volatile memory device receives a start command through a command line, receives an address through an address line, receives at least one setting value through the address line, receives a confirm command corresponding to the start command through the command line, sets at least one parameter of the non-volatile memory device as the setting value based on the start command, a number of the setting value, and the confirm command, and executes an operation that corresponds to the start command, on a memory cell that corresponds to the address, based on the set parameter.

Abstract: A read method of a nonvolatile memory device includes reading data from a selected memory area of the nonvolatile memory device according to a first read voltage; detecting and correcting an error of the read data; and deciding a second read voltage for reading the selected memory area when an error of the read data is uncorrectable. The second read voltage is decided according to either the number of logical 0s or 1s included in the read data, or a ratio of logical 1s to logical 0s in the read data.