Abstract: Disclosed herein are a multilayered power inductor including a magnetic layer, an inner electrode layer, and an outer electrode layer, wherein a pore ratio at a section of the inner electrode layer is 7% or less and a method for preparing the same. According to the exemplary embodiments of the present invention, the number of pores in the inner electrode layer of the multilayered power inductor can be minimized and the residual carbon can be removed by the sintering delay of the inner electrode to increase the densification of the inner electrode layer after being sintered, thereby improving the RDC characteristics of the multilayered power inductor. Therefore, the multilayered power inductor including the inner electrode layer according to the exemplary embodiments of the present invention can implement the high capacity and the low RDC, thereby providing the small, thin, and multi-functional chip components.

Abstract: Disclosed herein are a multilayered power inductor including a magnetic layer, an inner electrode layer, and an outer electrode layer, wherein a pore ratio at a section of the inner electrode layer is 7% or less and a method for preparing the same. According to the exemplary embodiments of the present invention, the number of pores in the inner electrode layer of the multilayered power inductor can be minimized and the residual carbon can be removed by the sintering delay of the inner electrode to increase the densification of the inner electrode layer after being sintered, thereby improving the RDC characteristics of the multilayered power inductor. Therefore, the multilayered power inductor including the inner electrode layer according to the exemplary embodiments of the present invention can implement the high capacity and the low RDC, thereby providing the small, thin, and multi-functional chip components.