Patents by Inventor Myung Jun

Myung Jun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070187758
    Abstract: Provided is a high-performance n-type Schottky barrier tunneling transistor with low Schottky barrier for electrons due to a Schottky junction formed on a Si (111) surface created through anisotropic etching. The Schottky barrier tunneling transistor includes: a silicon on insulator (SOI) substrate; a source and a drain formed on the SOI substrate; a channel formed between the source and the drain; a gate insulating layer and a gate electrode sequentially formed on the channel; and a sidewall insulating layer formed on both sidewalls of the gate insulating layer and the gate electrode, wherein an interface between the source/drain and the channel is on a Si (111) in the channel, and the source and drain consists of metal silicide through silicidation with a predetermined metal and forms a Schottky junction with the silicon channel.
    Type: Application
    Filed: December 7, 2006
    Publication date: August 16, 2007
    Inventors: Myung Jun, Moon Jang, Yark Kim, Chel Choi, Byoung Park, Seong Lee
  • Publication number: 20070128781
    Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same. The method includes the steps of: preparing a substrate; forming an active silicon layer on the substrate; forming a gate insulating layer on a region of the silicon layer; forming a gate electrode on the gate insulating layer; implanting ions into the silicon layer on which the gate insulating layer is not formed; and annealing the ion-implanted silicon layer. Accordingly, it is possible to manufacture the Schottky barrier tunnel transistor having stable characteristics and high performance by implanting the ions into the silicon layer using an ion implantation method and then annealing the silicon layer to form metal-silicide.
    Type: Application
    Filed: August 11, 2006
    Publication date: June 7, 2007
    Inventors: Moon Jang, Seong Lee, Yark Kim, Chel Choi, Myung Jun
  • Publication number: 20070034951
    Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.
    Type: Application
    Filed: July 13, 2006
    Publication date: February 15, 2007
    Inventors: Yark Kim, Seong Lee, Moon Jang, Chel Choi, Myung Jun, Byoung Park