Abstract: Provided is a method of manufacturing a ZnO-based thin film transistor (TFT). The method may include forming source and drain electrodes using one or two wet etchings. A tin (Sn) oxide, a fluoride, or a chloride having relatively stable bonding energy against plasma may be included in a channel layer. Because the source and drain electrodes are formed by wet etching, damage to the channel layer and an oxygen vacancy may be prevented or reduced. Because the material having higher bonding energy is distributed in the channel layer, damage to the channel layer occurring when a passivation layer is formed may be prevented or reduced.

Abstract: Disclosed are a crystallization pattern, and a method for crystallizing amorphous silicon. The method includes the steps of forming an amorphous silicon film on a glass substrate, forming a crystallization pattern by patterning the amorphous silicon film, and crystallizing the crystallization pattern into polycrystalline silicon by irradiating a laser onto the crystallization pattern. The crystallization pattern includes a peripheral region located within a first distance from an edge of the crystallization pattern, and an internal region located away from the edge of the crystallization pattern by more than the first distance. The internal region is divided into at least one sub-region, each sub-region includes one crystallization inducement pattern, and an edge of each sub-region is located within a second distance from the crystallization inducement pattern.

Abstract: Disclosed is a thin film transistor (TFT). The TFT may include an intermediate layer between a channel and a source and drain. An increased off current, which may occur to a drain area of the TFT, is reduced due to the intermediate layer. Accordingly, the TFT may be stably driven.

Abstract: A ZnO-based thin film transistor (TFT) is provided herein, as is a method of manufacturing the TFT. The ZnO-based TFT has a channel layer that comprises ZnO and ZnCl, wherein the ZnCl has a higher bonding energy than ZnO with respect to plasma. The ZnCl is formed through the entire channel layer, and specifically is formed in a region near THE surface of the channel layer. Since the ZnCl is strong enough not to be decomposed when exposed to plasma etching gas, an increase in the carrier concentration can be prevented. The distribution of ZnCl in the channel layer, may result from the inclusion of chlorine (Cl) in the plasma gas during the patterning of the channel layer.

Abstract: Provided may be a Poly-Si thin film transistor (TFT) and a method of manufacturing the same. The Poly-Si TFT may include a first Poly-Si layer on an active layer formed of Poly-Si and doped with a low concentration; and a second Poly-Si layer on the first Poly-Si layer and doped with the same concentration as the first Poly-Si layer or with a higher concentration than the first Poly-Si layer, wherein lightly doped drain (LDD) regions capable of reducing leakage current may be formed in inner end portions of the first Poly-Si layer.

Abstract: A ZnO-based thin film transistor (TFT) is provided herein, as is a method of manufacturing the TFT. The ZnO-based TFT has a channel layer that comprises ZnO and ZnCl, wherein the ZnCl has a higher bonding energy than ZnO with respect to plasma. The ZnCl is formed through the entire channel layer, and specifically is formed in a region near THE surface of the channel layer. Since the ZnCl is strong enough not to be decomposed when exposed to plasma etching gas, an increase in the carrier concentration can be prevented. The distribution of ZnCl in the channel layer, may result from the inclusion of chlorine (Cl) in the plasma gas during the patterning of the channel layer.

Abstract: Example embodiments provide an atomic layer deposition apparatus and a method of depositing an atomic layer using the atomic layer deposition apparatus. The atomic layer deposition apparatus may include a reaction chamber, a substrate supporter installed in the reaction chamber to support a substrate, and a shower head that is disposed above the substrate supporter and has at least one nozzle set that simultaneously inject a first source gas, a second source gas, and a purge gas onto the substrate. The method of depositing an atomic layer may include moving at least one of the substrate and the shower head in a first direction and simultaneously depositing at least one first atomic layer and at least one second atomic layer on the substrate by injecting the first source gas, the second source gas, and the purge gas through the shower head while the moving operation is performed.

Abstract: An oxide semiconductor thin film transistor (TFT) and a method of manufacturing the oxide semiconductor TFT. The oxide semiconductor TFT includes a first gate insulating layer arranged between an oxide semiconductor channel layer and a first gate and a second gate insulating layer arranged between the channel layer and a second gate. The first and second gate insulating layers are made out of different materials and have different thicknesses. Preferably, the second gate insulating layer is silicon oxide and is thinner than the first gate insulating layer which is preferably silicon nitride. Oxide semiconductor refers to an oxide material such as Zinc Oxide, Tin Oxide, Ga—In—Zn Oxide, In—Zn Oxide, In—Sn Oxide, and one of Zinc Oxide, Tin Oxide, Ga—In—Zn Oxide, In—Zn Oxide and In—Sn Oxide.

Abstract: Methods of manufacturing an oxide semiconductor thin film transistor are provided. The methods include forming a gate on a substrate, and a gate insulating layer on the substrate to cover the gate. A channel layer, which is formed of an oxide semiconductor, may be formed on the gate insulating layer. Source and drain electrodes may be formed on opposing sides of the channel layer. The method includes forming supplying oxygen to the channel layer, forming a passivation layer to cover the source and drain electrodes and the channel layer, and performing an annealing process after forming the passivation layer.

Abstract: A display device including an oxide semiconductor thin film transistor is provided. The display device includes at least one thin film transistor, and at least one storage capacitor. The storage capacitor includes a storage electrode formed of a transparent oxide semiconductor, and a pixel electrode over the storage electrode. The pixel electrode may be separated from the storage electrode by a desired distance.

Abstract: Oxide semiconductor thin film transistors (TFT) and methods of manufacturing the same are provided. The methods include forming a channel layer on a substrate, forming source and drain electrodes at opposing sides of the channel layer, and oxidizing a surface of the channel layer by placing an oxidizing material in contact with the surface of the channel layer, reducing carriers on the surface of the channel layer. Due to the oxidizing agent treatment of the surface of the channel layer, excessive carriers that are generated naturally, or during the manufacturing process, may be more effectively controlled.

Abstract: Example embodiments relate to a poly-crystalline silicon (Si) thin film, a thin film transistor (TFT) formed from a poly-crystalline silicon (Si) thin film and methods of manufacturing the same. The method of manufacturing the poly-crystalline Si thin film includes forming an active layer formed of amorphous Si on a substrate, coating a gold nanorod on the active layer, and irradiating infrared rays onto the gold nanorod to crystallize the active layer.

Abstract: Provided is a method of manufacturing a ZnO-based thin film transistor (TFT). The method may include forming source and drain electrodes using one or two wet etchings. A tin (Sn) oxide, a fluoride, or a chloride having relatively stable bonding energy against plasma may be included in a channel layer. Because the source and drain electrodes are formed by wet etching, damage to the channel layer and an oxygen vacancy may be prevented or reduced. Because the material having higher bonding energy is distributed in the channel layer, damage to the channel layer occurring when a passivation layer is formed may be prevented or reduced.

Abstract: A TFT includes a zinc oxide (ZnO)-based channel layer having a plurality of semiconductor layers. An uppermost of the plurality of semiconductor layers has a Zn concentration less than that of a lower semiconductor layer to suppress an oxygen vacancy due to plasma. The uppermost semiconductor layer of the channel layer also has a tin (Sn) oxide, a chloride, a fluoride, or the like, which has a relatively stable bonding energy against plasma. The uppermost semiconductor layer is relatively strong against plasma shock and less decomposed when being exposed to plasma, thereby suppressing an increase in carrier concentration.

Abstract: A ZnO-based thin film transistor (TFT) is provided herein. Also provided is a method for manufacturing the TFT. The ZnO-based TFT is very sensitive to the oxygen concentration present in a channel layer. In order to prevent damage to a channel layer of a bottom gate TFT, and to avoid a deep negative threshold voltage resulting from damage to the channel layer, the method for manufacturing the ZnO-based TFT comprises formation of an etch stop layer or a passivation layer comprising unstable or incompletely bonded oxygen, and annealing the layers to induce an interfacial reaction between the oxide layer and the channel layer and to reduce the carrier concentration.

Abstract: A ZnO-based thin film transistor (TFT) is provided herein, as is a method of manufacturing the TFT. The ZnO-based TFT has a channel layer that comprises ZnO and ZnCl, wherein the ZnCl has a higher bonding energy than ZnO with respect to plasma. The ZnCl is formed through the entire channel layer, and specifically is formed in a region near THE surface of the channel layer. Since the ZnCl is strong enough not to be decomposed when exposed to plasma etching gas, an increase in the carrier concentration can be prevented. The distribution of ZnCl in the channel layer, may result from the inclusion of chlorine (Cl) in the plasma gas during the patterning of the channel layer.

Abstract: Provided are a thin film transistor and a method of manufacturing the same. The thin film transistor includes: a lower structure; a semiconductor layer formed on the lower structure and including a plurality of doping regions; a first insulating layer and a second insulating layer formed on the semiconductor layer and separated from each other; a third insulating layer formed on the first insulating layer and the second insulating layer; and a gate electrode layer formed between regions of the third insulating layer respectively corresponding to the first insulating layer and the second insulating layer.

Abstract: Disclosed is a method for forming a polycrystalline film. The method for forming a polycrystalline film from a film deposited on a glass substrate while a buffer layer is interposed between the deposited film and the glass substrate, which includes the steps of: preparing a mask including a transparent region having a larger size than that of resolution limitation of a laser beam equipment and an opaque region having a size which is smaller than that of the resolution limitation of the laser beam equipment; and irradiating laser beam of the maximum intensity to a film under the transparent region while irradiating the laser beam having a minimum intensity exceeding zero to the film under an opaque region by using the mask, thereby crystallizing the film by single irradiation of the laser beam.

Abstract: Disclosed are a crystallization pattern, and a method for crystallizing amorphous silicon. The method includes the steps of forming an amorphous silicon film on a glass substrate, forming a crystallization pattern by patterning the amorphous silicon film, and crystallizing the crystallization pattern into polycrystalline silicon by irradiating a laser onto the crystallization pattern. The crystallization pattern includes a peripheral region located within a first distance from an edge of the crystallization pattern, and an internal region located away from the edge of the crystallization pattern by more than the first distance. The internal region is divided into at least one sub-region, each sub-region includes one crystallization inducement pattern, and an edge of each sub-region is located within a second distance from the crystallization inducement pattern.

Abstract: Disclosed is a method for forming a polycrystalline silicon film of a polycrystalline silicon thin film transistor. The method includes a step of crystallizing an amorphous silicon film deposited on a glass substrate by irradiating a laser beam onto the amorphous silicon film using a mask pattern. The glass substrate is horizontally moved by a predetermined distance unit corresponding to a translation distance of the mask pattern when the laser beam is irradiated onto the amorphous silicon film through a mask having the mask pattern, thereby growing grains in a circular shape.