Abstract: A method of diminishing a step difference 41 in a multi-layered semiconductor device which comprises determining a location 40 of a step difference 41 on a multi-layered semiconductor device 50 to be formed by utilizing a plurality of conducting layers 35 and a plurality of insulating layers 36 sequentially formed such that the layers are sequentially stacked on a surface of a substrate to form a step difference 41 location 40 on the substrate is disclosed. A conducting layer 3 is deposited on the substrate. A first dummy layer 3C is formed at the step difference location while simultaneously forming a gate electrode 3A and a gate electrode line 3B by performing a mask patterning process. A first insulating layer 5 is deposited on the gate electrode 3A, gate electrode line 3 and the first dummy insulating layer 5A. A second conducting layer 6 is deposited on the first insulating layer 5.