Patents by Inventor Myung Shik Lee

Myung Shik Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11345671
    Abstract: The present invention relates to a novel phenylsulfonyl oxazole derivative and a use thereof and specifically, to a compound represented by Chemical Formula 1 in the present specification or a pharmaceutically acceptable salt thereof, and to a use thereof for prevention, treatment, or improvement of neurodegenerative disease.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: May 31, 2022
    Assignees: KYUNGPOOK NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION, INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY, GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY, SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Jae Sung Bae, Hee Kyung Jin, Myung Shik Lee, Hye Jin Lim, Jin Hee Ahn, Haushabhau Shivaji Pagire, Min Jae Lee
  • Publication number: 20210070718
    Abstract: The present invention relates to a novel phenylsulfonyl oxazole derivative and a use thereof and specifically, to a compound represented by Chemical Formula 1 in the present specification or a pharmaceutically acceptable salt thereof, and to a use thereof for prevention, treatment, or improvement of neurodegenerative disease.
    Type: Application
    Filed: January 10, 2019
    Publication date: March 11, 2021
    Inventors: Jae Sung BAE, Hee Kyung JIN, Myung Shik LEE, Hye Jin LIM, Jin Hee AHN, Haushabhau Shivaji PAGIRE, Min Jae Lee
  • Patent number: 10881642
    Abstract: Provided are a compound of chemical formula 1 or 2 and a use thereof. The compound can be advantageously used in the prevention or treatment of metabolic diseases including type 2 diabetes, insulin resistance, or obesity, on the basis of a mechanism of autophagy activation through the promotion of lysosome production.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: January 5, 2021
    Assignees: Industry-Academic Cooperation Foundation, Yonsei University, Gwangju Institute of Science and Technology
    Inventors: Myung-Shik Lee, Hyejin Lim, Young Eui Jeon, Jin Hee Ahn, H. S. Pagire
  • Publication number: 20190336483
    Abstract: Provided are a compound of chemical formula 1 or 2 and a use thereof. The compound can be advantageously used in the prevention or treatment of metabolic diseases including type 2 diabetes, insulin resistance, or obesity, on the basis of a mechanism of autophagy activation through the promotion of lysosome production.
    Type: Application
    Filed: June 29, 2017
    Publication date: November 7, 2019
    Applicants: Industry-Academic Cooperation Foundation, Yonsei University, Gwangju Institute of Science and Technology
    Inventors: Myung-Shik LEE, Hyejin LIM, Young Eui JEON, Jin Hee AHN, H.S. PAGIRE
  • Publication number: 20140043905
    Abstract: A semiconductor memory device includes a memory cell block formed over a first memory cell region and a second memory cell region defined on a semiconductor substrate, and a voltage supply circuit configured to apply an operating voltage to gate lines of a plurality of memory cells included in the memory cell block, wherein a first air gap disposed between the gate lines in the first memory cell region has a smaller size than a second air gap disposed between the gate lines in the second memory cell region.
    Type: Application
    Filed: September 6, 2012
    Publication date: February 13, 2014
    Inventor: Myung Shik LEE
  • Patent number: 8377782
    Abstract: A method for fabricating a non-volatile memory device with asymmetric source/drain junctions, wherein a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: February 19, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Ok Hong, Myung Shik Lee
  • Publication number: 20120094451
    Abstract: A method for fabricating a non-volatile memory device with asymmetric source/drain junctions, wherein a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.
    Type: Application
    Filed: December 27, 2011
    Publication date: April 19, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Young Ok HONG, Myung Shik LEE
  • Patent number: 8110866
    Abstract: Disclosed herein are non-volatile memory devices with asymmetric source/drain junctions and a method for fabricating the same. According to the method, a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: February 7, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Ok Hong, Myung Shik Lee
  • Patent number: 8093124
    Abstract: A method of manufacturing a nonvolatile memory device includes forming a tunnel insulating layer over a semiconductor substrate, forming a charge trap layer, including first impurity ions of a first concentration, over the tunnel insulating layer, forming a compensation layer, including second impurity ions of a second concentration, over the charge trap layer, diffusing the second impurity ions within the compensation layer toward the charge trap layer, removing the compensation layer, forming a dielectric layer on surfaces of the charge trap layer, and forming a conductive layer for a control gate on the dielectric layer.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: January 10, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Myung Shik Lee, Jin Gu Kim
  • Publication number: 20110204430
    Abstract: A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.
    Type: Application
    Filed: April 29, 2011
    Publication date: August 25, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Se Jun KIM, Eun Seok CHOI, Kyoung Hwan PARK, Hyun Seung YOO, Myung Shik LEE, Young Ok HONG, Jung Ryul AHN, Yong Top KIM, Kyung Pil HWANG, Won Sic WOO, Jae Young PARK, Ki Hong LEE, Ki Seon PARK, Moon Sig JOO
  • Publication number: 20110207287
    Abstract: A method of manufacturing a nonvolatile memory device includes forming a tunnel insulating layer over a semiconductor substrate, forming a charge trap layer, including first impurity ions of a first concentration, over the tunnel insulating layer, forming a compensation layer, including second impurity ions of a second concentration, over the charge trap layer, diffusing the second impurity ions within the compensation layer toward the charge trap layer, removing the compensation layer, forming a dielectric layer on surfaces of the charge trap layer, and forming a conductive layer for a control gate on the dielectric layer.
    Type: Application
    Filed: November 24, 2010
    Publication date: August 25, 2011
    Inventors: Myung Shik LEE, Jin Gu KIM
  • Patent number: 7955960
    Abstract: A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: June 7, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Se Jun Kim, Eun Seok Choi, Kyoung Hwan Park, Hyun Seung Yoo, Myung Shik Lee, Young Ok Hong, Jung Ryul Ahn, Yong Top Kim, Kyung Pil Hwang, Won Sic Woo, Jae Young Park, Ki Hong Lee, Ki Seon Park, Moon Sig Joo
  • Publication number: 20090096011
    Abstract: Disclosed herein are non-volatile memory devices with asymmetric source/drain junctions and a method for fabricating the same. According to the method, a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.
    Type: Application
    Filed: June 3, 2008
    Publication date: April 16, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Young Ok Hong, Myung Shik Lee
  • Publication number: 20080230830
    Abstract: A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.
    Type: Application
    Filed: March 21, 2008
    Publication date: September 25, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Se Jun KIM, Eun Seok CHOI, Kyoung Hwan PARK, Hyun Seung YOO, Myung Shik LEE, Young Ok HONG, Jung Ryul AHN, Yong Top KIM, Kyung Pil HWANG, Won Sic WOO, Jae Young PARK, Ki Hong LEE, Ki Seon PARK, Moon Sig JOO