Patents by Inventor Myung Suk Lee

Myung Suk Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11950425
    Abstract: A mold structure includes gate electrodes stacked on a first substrate, a channel structure penetrating a first region of the mold structure to cross the gate electrodes, a first through structure penetrating a second region of the mold structure, and a second through structure penetrating a third region of the mold structure. The mold structure includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell and dummy blocks includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: April 2, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung Hun Lee, Dong Ha Shin, Pan Suk Kwak, Dae Seok Byeon
  • Patent number: 11931798
    Abstract: Disclosure provides a two-segment electromagnet stirring member, and a two-segment electromagnet semi-solid die-casting apparatus including the same, and a die-casting method using the same. The two-segment electromagnet stirring member includes a plurality of magnetic field generation parts therein, and includes a first electromagnetic stirring part and a second electromagnetic stirring part separated from each other. The first electromagnetic stirring part and the second electromagnetic stirring part are coupled to each other in a ring shape to surround an outer circumferential surface of a sleeve to perform electromagnetic stirring to molten metal in the sleeve, and are coupled to each other so as to position the plurality of magnetic field generation parts at radially equal gaps around the sleeve.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: March 19, 2024
    Assignee: HANJOO LIGHT METAL CO., LTD.
    Inventors: Yong-Jin Lee, Jin-Ha Park, Myung-Seong Kong, Seong-Rak Park, Joong-Suk Roh
  • Publication number: 20240083384
    Abstract: A vehicle seat reinforcement device includes a leg portion mounted on a floor panel, a seat cushion frame slidably mounted on the leg portion, and a load reinforcing structure connected between the leg portion and the seat cushion frame, wherein when a seat belt anchorage load is transferred to the seat cushion frame, the seat cushion frame is locked to the leg portion by the load reinforcing structure.
    Type: Application
    Filed: February 3, 2023
    Publication date: March 14, 2024
    Applicants: Hyundai Motor Company, Kia Corporation, Daechang Seat Co.,LTD-Dongtan, Hyundai Transys Inc.
    Inventors: Sang Soo LEE, Chan Ho JUNG, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Deok Soo LIM, Sang Do PARK, In Sun BAEK, Sin Chan YANG, Chan Ki CHO, Myung Soo LEE, Jae Yong JANG, Jun Sik HWANG, Ho Sung KANG, Hae Dong KWAK, Hyun Tak KO
  • Publication number: 20240078218
    Abstract: The apparatus for validating various kinds of data and a digital twin operation includes a validation target data selector configured to select a target to be validated among various kinds of input data, a data validator configured to validate individual data for each type of data selected for validation, and a data linkage validator configured to validate various kinds of multiple data by linking the various kinds of multiple data in order to detect an error in a process of linking the various kinds of multiple data.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 7, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Myung-Sun BAEK, Young Soo PARK, Yong Tae LEE, Eui Suk JUNG
  • Publication number: 20220220930
    Abstract: A small hydropower of a novel concept, comprising: two side supports; a main rotation axis provided on the upper end between the two side supports; a rotation body for rotating around the main rotation axis; fillable-then-emptiable water containers which are provided around the circumference of the rotation body, remain horizontally level, add weight by being filled with a certain amount of water when positioned at the top center of the rotation body during rotation, and remove the weight by spilling when positioned at the bottom center; a selective water supply device which can provide, to a fillable-then-emptiable water container that is positioned at the top center of the rotation body, water, and which temporarily stops discharging water until the next fillable-then-emptiable water container is positioned, if one fillable-then-emptiable water container is completely filled.
    Type: Application
    Filed: July 29, 2019
    Publication date: July 14, 2022
    Inventors: Sung Ho NAM, Myung Suk LEE
  • Publication number: 20150014663
    Abstract: Provided is an organic light-emitting display apparatus including a hybrid protective film. The organic light-emitting display apparatus includes a substrate, a display unit disposed on the substrate and including an organic light-emitting device (OLED), and an encapsulation unit encapsulating the display unit and including the hybrid protective film. The hybrid protective film includes an inorganic part layer where carbon is removed, an organic part layer where carbon is contained in a predetermined amount, and a gradient part layer disposed between the inorganic part layer and the organic part layer and increasing an amount of carbon as being more contiguous to the organic part layer.
    Type: Application
    Filed: July 11, 2014
    Publication date: January 15, 2015
    Inventors: Soon Jong KWAK, Jae Ho JUN, Myung Suk LEE
  • Publication number: 20140173231
    Abstract: Disclosed is a semiconductor memory device for controlling a memory block. The semiconductor memory device includes a plurality of memory blocks to store data, and controller. The memory controller requests a first memory block, of the plurality of memory blocks, to performing a copy operation to copy the first memory block to a second memory block of the plurality of memory blocks. The controller then requests the first memory block to perform an operation different than the copy operation. The controller then requests the memory block to stop the copy operation based on the to perform an operation different than the copy operation. Finally, the controller requests the memory block to resume the copy operation after the operation different than the copy operation is completed.
    Type: Application
    Filed: August 15, 2013
    Publication date: June 19, 2014
    Applicant: SK hynix Inc.
    Inventors: Myung-Suk LEE, Jeong-Soon KWAK, Eui-Jin KIM, Gi-Pyo UM
  • Publication number: 20130338217
    Abstract: There is provided an antibiotic composition including Eisenia bicyclis-derived phlorotannin compound, in which the antibiotic composition includes a phlorotannin compound selected from 7-phloroeckol, fucofuroeckol-A, and dioxinodehydroeckol, or mixture thereof, which are derived from Eisenia bicyclis, as an effective component. The compounds described above exhibit an antibiotic activity against an antibiotic-resistant bacterium. In addition, the compound described above can exhibit a synergetic effect by using in combination with ?-lactam-based antibiotic composition by recovering an antibiotic activity of ?-lactam-based antibiotic, such as ampicillin, penicillin, and oxacillin against MRSA.
    Type: Application
    Filed: October 30, 2012
    Publication date: December 19, 2013
    Applicant: Pukyong National University Industry-University Cooperation Foundation
    Inventors: Se-Kwon KIM, Young-Mog Kim, Myung-Suk Lee, Sung-Hwan Eom
  • Patent number: 8392647
    Abstract: A solid state storage system includes a flash memory area and a memory controller. The flash memory area includes memory blocks and replacement blocks configured to replace bad blocks occurring within the memory blocks. The memory controller is configured to perform a logical-to-physical address mapping on logical blocks including the replacement blocks, and select the replacement blocks using logical addresses of the logical blocks corresponding to the bad blocks.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: March 5, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Myung Suk Lee, Wun Mo Yang, Jeong Soon Kwak
  • Patent number: 8370680
    Abstract: A solid state storage system includes a flash memory region comprising a plurality of memory blocks and a plurality of replacement blocks corresponding to error-occurred blocks when errors occur in the memory blocks; and a memory controller configured to perform a control operation to replace the error-occurred blocks with the replacement blocks, wherein the error-occurred blocks comprise correctable blocks and uncorrectable blocks, and wherein the memory controller determines whether the error-occurred blocks are the correctable blocks or the uncorrectable blocks and controls zones of the replacement blocks, replaced in correspondence to the correctable blocks, to be allocated a plurality of times.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: February 5, 2013
    Assignee: SK Hynix Inc.
    Inventors: Myung Suk Lee, Jeong Soon Kwak, Kyeong Rho Kim, Yang Gi Moon
  • Patent number: 8214698
    Abstract: The presented solid state storage system provides an efficient manner of processing read and write operations in a memory block that has a faulty page of memory within it. The solid state storage system includes a flash memory area and a memory controller. The memory controller stores link information into a buffer, allocates a first temporary physical block to resume operations of the bad block past the first bad page, updates and stores mapping information associated with the remaining portions of the bad block past the first bad page, and merges together those valid pages from among the bad block into a final physical block by merging together all prior successfully operated valid pages from among the bad block with any subsequently successfully operated valid pages which are associated with successful operations subsequently to the failure in the first bad page of the bad block.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: July 3, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Ho Kim, Kyeong Rho Kim, Myung Suk Lee
  • Publication number: 20120159280
    Abstract: There is provided a method for controlling a nonvolatile memory apparatus in a nonvolatile memory system including a host interface, a memory controller, and a memory area. The method includes: checking a number of ECC fail bits, determining whether or not to replace a corresponding block, and replacing the block, while a read command provided from the host interface is performed; and replacing a block, which was not replaced during the read operation, with a block to be used as a replacement target during a write operation.
    Type: Application
    Filed: July 29, 2011
    Publication date: June 21, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventors: Wun Mo YANG, Kyeong Rho KIM, Myung Suk LEE, Jeong Soon KWAK
  • Patent number: 8068363
    Abstract: A flash memory apparatus of an embodiment is configured to include a flash memory including a plurality of blocks and a read operation control circuit determining whether to replace a block in accordance with the number of times a read process is performed for each block of the plurality of blocks.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: November 29, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Myung Suk Lee, Jeong Soon Kwak, Do Hee Kim
  • Publication number: 20110161727
    Abstract: A solid state storage system includes a flash memory region comprising a plurality of memory blocks and a plurality of replacement blocks corresponding to error-occurred blocks when errors occur in the memory blocks; and a memory controller configured to perform a control operation to replace the error-occurred blocks with the replacement blocks, wherein the error-occurred blocks comprise correctable blocks and uncorrectable blocks, and wherein the memory controller determines whether the error-occurred blocks are the correctable blocks or the uncorrectable blocks and controls zones of the replacement blocks, replaced in correspondence to the correctable blocks, to be allocated a plurality of times.
    Type: Application
    Filed: July 19, 2010
    Publication date: June 30, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventors: Myung Suk LEE, Jeong Soon Kwak, Kyeong Rho Kim, Yang Gi Moon
  • Publication number: 20110078364
    Abstract: A solid state storage system includes a flash memory area and a memory controller. The flash memory area includes memory blocks and replacement blocks configured to replace bad blocks occurring within the memory blocks. The memory controller is configured to perform a logical-to-physical address mapping on logical blocks including the replacement blocks, and select the replacement blocks using logical addresses of the logical blocks corresponding to the bad blocks.
    Type: Application
    Filed: December 24, 2009
    Publication date: March 31, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Myung Suk LEE, Wun Mo YANG, Jeong Soon KWAK
  • Publication number: 20110055623
    Abstract: The presented solid state storage system provides an efficient manner of processing read and write operations in a memory block that has a faulty page of memory within it. The solid state storage system includes a flash memory area and a memory controller. The memory controller stores link information into a buffer, allocates a first temporary physical block to resume operations of the bad block past the first bad page, updates and stores mapping information associated with the remaining portions of the bad block past the first bad page, and merges together those valid pages from among the bad block into a final physical block by merging together all prior successfully operated valid pages from among the bad block with any subsequently successfully operated valid pages which are associated with successful operations subsequently to the failure in the first bad page of the bad block.
    Type: Application
    Filed: December 29, 2009
    Publication date: March 3, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Young Ho KIM, Kyeong Rho KIM, Myung Suk LEE
  • Publication number: 20100165732
    Abstract: A flash memory apparatus of an embodiment is configured to include a flash memory including a plurality of blocks and a read operation control circuit determining whether to replace a block in accordance with the number of times a read process is performed for each block of the plurality of blocks.
    Type: Application
    Filed: June 30, 2009
    Publication date: July 1, 2010
    Inventors: Myung Suk LEE, Jeong Soon KWAK, Do Hee KIM