Abstract: Provided are a 3-dimensional electronic device and a method for manufacturing the 3-dimensional electronic device. The method includes coupling semiconductor chips and guide blocks onto a substrate, forming an upper mold layer and upper wires on the semiconductor chips and the guide blocks by using a 3D printing method, stacking substrates other than the substrate on the upper mold layer and the upper wires, sawing a portion of each of the guide blocks and the upper mold layer, and forming a side mold layer and side wires on sidewalls of via electrodes of the guide blocks by using the 3D printing method.

Abstract: Provided is an apparatus for cell particle sorting based on microfluidic-chip flow, by using a design in which Dean flow focusing occurring in a spiral channel and hydrodynamic filtration are coupled. The apparatus comprises a first substrate including a spiral channel having an inner surface and an outer surface based on a radius of curvature, a sample solution inlet, a medium inlet, and a spiral inner-outlet and a spiral outer-outlet both for discharging the particles, and a second substrate including a main channel in which the sample solution discharged from the first substrate and passing through an inter-substrate way flows and a cut-off width WC is set, a side channel allowing a medium introduced into the medium inlet to flow to focus the sample solution on a sidewall of the main channel, a plurality of branch channels connected to the sidewall of main channel and configured to receive the particles from the main channel, a main channel outlet, and at least one branch channel outlet.

Abstract: A non-volatile memory chip comprises a cell region that includes a first surface, a second surface opposite to the first surface, a first cell structure, and a second cell structure spaced apart from the first cell structure; a peripheral circuit region on the first surface of the cell region, and that includes a first peripheral circuit connected to the first cell structure, a second peripheral circuit connected to the second cell structure, and a connection circuit between the first and second peripheral circuits; a through via between the first and second cell structures and that extends from the second surface of the cell region to the connection circuit of the peripheral circuit region; a redistribution layer that covers the through via on the second surface of the cell region, is connected to the through via, and extends along the second surface; and a chip pad connected to the redistribution layer.

Abstract: A small hydropower of a novel concept, comprising: two side supports; a main rotation axis provided on the upper end between the two side supports; a rotation body for rotating around the main rotation axis; fillable-then-emptiable water containers which are provided around the circumference of the rotation body, remain horizontally level, add weight by being filled with a certain amount of water when positioned at the top center of the rotation body during rotation, and remove the weight by spilling when positioned at the bottom center; a selective water supply device which can provide, to a fillable-then-emptiable water container that is positioned at the top center of the rotation body, water, and which temporarily stops discharging water until the next fillable-then-emptiable water container is positioned, if one fillable-then-emptiable water container is completely filled.

Abstract: A small hydropower of a novel concept, comprising: two side supports; a main rotation axis provided on the upper end between the two side supports; a rotation body for rotating around the main rotation axis; fillable-then-emptiable water containers which are provided around the circumference of the rotation body, remain horizontally level, add weight by being filled with a certain amount of water when positioned at the top center of the rotation body during rotation, and remove the weight by spilling when positioned at the bottom center; a selective water supply device which can provide, to a fillable-then-emptiable water container that is positioned at the top center of the rotation body, water, and which temporarily stops discharging water until the next fillable-then-emptiable water container is positioned, if one fillable-then-emptiable water container is completely filled.

Abstract: Provided is an organic light-emitting display apparatus including a hybrid protective film. The organic light-emitting display apparatus includes a substrate, a display unit disposed on the substrate and including an organic light-emitting device (OLED), and an encapsulation unit encapsulating the display unit and including the hybrid protective film. The hybrid protective film includes an inorganic part layer where carbon is removed, an organic part layer where carbon is contained in a predetermined amount, and a gradient part layer disposed between the inorganic part layer and the organic part layer and increasing an amount of carbon as being more contiguous to the organic part layer.

Abstract: Disclosed is a semiconductor memory device for controlling a memory block. The semiconductor memory device includes a plurality of memory blocks to store data, and controller. The memory controller requests a first memory block, of the plurality of memory blocks, to performing a copy operation to copy the first memory block to a second memory block of the plurality of memory blocks. The controller then requests the first memory block to perform an operation different than the copy operation. The controller then requests the memory block to stop the copy operation based on the to perform an operation different than the copy operation. Finally, the controller requests the memory block to resume the copy operation after the operation different than the copy operation is completed.

Abstract: There is provided an antibiotic composition including Eisenia bicyclis-derived phlorotannin compound, in which the antibiotic composition includes a phlorotannin compound selected from 7-phloroeckol, fucofuroeckol-A, and dioxinodehydroeckol, or mixture thereof, which are derived from Eisenia bicyclis, as an effective component. The compounds described above exhibit an antibiotic activity against an antibiotic-resistant bacterium. In addition, the compound described above can exhibit a synergetic effect by using in combination with ?-lactam-based antibiotic composition by recovering an antibiotic activity of ?-lactam-based antibiotic, such as ampicillin, penicillin, and oxacillin against MRSA.

Abstract: A solid state storage system includes a flash memory area and a memory controller. The flash memory area includes memory blocks and replacement blocks configured to replace bad blocks occurring within the memory blocks. The memory controller is configured to perform a logical-to-physical address mapping on logical blocks including the replacement blocks, and select the replacement blocks using logical addresses of the logical blocks corresponding to the bad blocks.

Abstract: A solid state storage system includes a flash memory region comprising a plurality of memory blocks and a plurality of replacement blocks corresponding to error-occurred blocks when errors occur in the memory blocks; and a memory controller configured to perform a control operation to replace the error-occurred blocks with the replacement blocks, wherein the error-occurred blocks comprise correctable blocks and uncorrectable blocks, and wherein the memory controller determines whether the error-occurred blocks are the correctable blocks or the uncorrectable blocks and controls zones of the replacement blocks, replaced in correspondence to the correctable blocks, to be allocated a plurality of times.

Abstract: The presented solid state storage system provides an efficient manner of processing read and write operations in a memory block that has a faulty page of memory within it. The solid state storage system includes a flash memory area and a memory controller. The memory controller stores link information into a buffer, allocates a first temporary physical block to resume operations of the bad block past the first bad page, updates and stores mapping information associated with the remaining portions of the bad block past the first bad page, and merges together those valid pages from among the bad block into a final physical block by merging together all prior successfully operated valid pages from among the bad block with any subsequently successfully operated valid pages which are associated with successful operations subsequently to the failure in the first bad page of the bad block.

Abstract: There is provided a method for controlling a nonvolatile memory apparatus in a nonvolatile memory system including a host interface, a memory controller, and a memory area. The method includes: checking a number of ECC fail bits, determining whether or not to replace a corresponding block, and replacing the block, while a read command provided from the host interface is performed; and replacing a block, which was not replaced during the read operation, with a block to be used as a replacement target during a write operation.

Abstract: A flash memory apparatus of an embodiment is configured to include a flash memory including a plurality of blocks and a read operation control circuit determining whether to replace a block in accordance with the number of times a read process is performed for each block of the plurality of blocks.

Abstract: A solid state storage system includes a flash memory region comprising a plurality of memory blocks and a plurality of replacement blocks corresponding to error-occurred blocks when errors occur in the memory blocks; and a memory controller configured to perform a control operation to replace the error-occurred blocks with the replacement blocks, wherein the error-occurred blocks comprise correctable blocks and uncorrectable blocks, and wherein the memory controller determines whether the error-occurred blocks are the correctable blocks or the uncorrectable blocks and controls zones of the replacement blocks, replaced in correspondence to the correctable blocks, to be allocated a plurality of times.

Abstract: A solid state storage system includes a flash memory area and a memory controller. The flash memory area includes memory blocks and replacement blocks configured to replace bad blocks occurring within the memory blocks. The memory controller is configured to perform a logical-to-physical address mapping on logical blocks including the replacement blocks, and select the replacement blocks using logical addresses of the logical blocks corresponding to the bad blocks.

Abstract: The presented solid state storage system provides an efficient manner of processing read and write operations in a memory block that has a faulty page of memory within it. The solid state storage system includes a flash memory area and a memory controller. The memory controller stores link information into a buffer, allocates a first temporary physical block to resume operations of the bad block past the first bad page, updates and stores mapping information associated with the remaining portions of the bad block past the first bad page, and merges together those valid pages from among the bad block into a final physical block by merging together all prior successfully operated valid pages from among the bad block with any subsequently successfully operated valid pages which are associated with successful operations subsequently to the failure in the first bad page of the bad block.

Abstract: A flash memory apparatus of an embodiment is configured to include a flash memory including a plurality of blocks and a read operation control circuit determining whether to replace a block in accordance with the number of times a read process is performed for each block of the plurality of blocks.