Patents by Inventor Myung Joon KWACK

Myung Joon KWACK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Opto-electronic system including optical input/output device
    Patent number: 10466413
    Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: November 5, 2019
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Gyungock Kim, Hyundai Park, In Gyoo Kim, Sang Hoon Kim, Ki Seok Jang, Sang Gi Kim, Jiho Joo, Yongseok Choi, Hyuk Je Kwon, Jaegyu Park, Sun Ae Kim, Jin Hyuk Oh, Myung joon Kwack
  • Method of manufacturing optical input/output device
    Patent number: 10168474
    Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: January 1, 2019
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Gyungock Kim, Hyundai Park, In Gyoo Kim, Sang Hoon Kim, Ki Seok Jang, Sang Gi Kim, Jiho Joo, Yongseok Choi, Hyuk Je Kwon, Jaegyu Park, Sun Ae Kim, Jin Hyuk Oh, myung joon Kwack
  • METHOD OF MANUFACTURING OPTICAL INPUT/OUTPUT DEVICE
    Publication number: 20170269298
    Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.
    Type: Application
    Filed: May 30, 2017
    Publication date: September 21, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Gyungock KIM, Hyundai PARK, In Gyoo KIM, Sang Hoon KIM, Ki Seok JANG, Sang Gi KIM, Jiho JOO, Yongseok CHOI, Hyuk Je KWON, Jaegyu PARK, Sun Ae KIM, Jin Hyuk OH, myung joon KWACK
  • OPTO-ELECTRONIC SYSTEM INCLUDING OPTICAL INPUT/OUTPUT DEVICE
    Publication number: 20170261705
    Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.
    Type: Application
    Filed: May 30, 2017
    Publication date: September 14, 2017
    Applicant: Electronics and Telecommunications Research Instit ute
    Inventors: Gyungock KIM, Hyundai PARK, In Gyoo KIM, Sang Hoon KIM, Ki Seok JANG, Sang Gi KIM, Jiho JOO, Yongseok CHOI, Hyuk Je KWON, Jaegyu PARK, Sun Ae KIM, Jin Hyuk OH, Myung Joon KWACK
  • Optical input/output device, optical electronic system including the same, and method of manufacturing the same
    Patent number: 9690042
    Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: June 27, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Gyungock Kim, Hyundai Park, In Gyoo Kim, Sang Hoon Kim, Ki Seok Jang, Sang Gi Kim, Jiho Joo, Yongseok Choi, Hyuk Je Kwon, Jaegyu Park, Sun Ae Kim, Jin Hyuk Oh, Myung Joon Kwack
  • Optical coupler having self-focusing region and arryed-waveguide grating structure including the same
    Patent number: 9164238
    Abstract: Provided are an optical coupler and an arrayed-waveguide grating structure including the same. The coupler includes a lower clad layer, a core comprising a slab waveguide region disposed on one side of the lower clad layer and a ridge waveguide region disposed on the other side of the lower clad layer, and an upper clad disposed on the core, wherein the ridge waveguide region comprises a self-focusing region configured to focus an optical signal provided form the slab waveguide region and thus to prevent scattering of the optical signal.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: October 20, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jaegyu Park, Hyundai Park, Jiho Joo, Myung joon Kwack, Gyungock Kim
  • OPTICAL COUPLER HAVING SELF-FOCUSING REGION AND ARRYED-WAVEGUIDE GRATING STRUCTURE INCLUDING THE SAME
    Publication number: 20150078708
    Abstract: Provided are an optical coupler and an arrayed-waveguide grating structure including the same. The coupler includes a lower clad layer, a core comprising a slab waveguide region disposed on one side of the lower clad layer and a ridge waveguide region disposed on the other side of the lower clad layer, and an upper clad disposed on the core, wherein the ridge waveguide region comprises a self-focusing region configured to focus an optical signal provided form the slab waveguide region and thus to prevent scattering of the optical signal.
    Type: Application
    Filed: July 11, 2014
    Publication date: March 19, 2015
    Inventors: Jaegyu PARK, Hyundai PARK, Jiho JOO, Myung joon KWACK, Gyungock KIM
  • OPTICAL INPUT/OUTPUT DEVICE, OPTICAL ELECTRONIC SYSTEM INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20140346532
    Abstract: Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method.
    Type: Application
    Filed: October 24, 2013
    Publication date: November 27, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Gyungock KIM, Hyundai PARK, In Gyoo KIM, Sang Hoon KIM, Ki Seok JANG, Sang Gi KIM, Jiho JOO, Yongseok CHOI, Hyuk Je KWON, Jaegyu PARK, Sun Ae KIM, Jin Hyuk OH, Myung Joon KWACK