Patents by Inventor MYUNG-KEUN LEE

MYUNG-KEUN LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240078974
    Abstract: A display device including: a power supply configured to supply a first power, a second power, and a third power to a first power line, a second power line, and a third power line, respectively, wherein each of the first power, the second power and the third power varies in voltage level during one frame period; and pixels connected to at least one of scan lines and data lines, and connected to a common control line, the first power line, the second power line, and the third power line, wherein the pixels simultaneously emit light when the second power is changed to a low level, and a number of times the second power is changed to the low level during the one frame period changes in response to an image refresh rate.
    Type: Application
    Filed: June 6, 2023
    Publication date: March 7, 2024
    Inventors: Hong Soo KIM, Myung Woo LEE, Suk Hun LEE, Jae Keun LIM
  • Publication number: 20240067668
    Abstract: The present invention relates to a heteroaryl derivative compound and a use thereof. Since the heteroaryl derivative of the present invention exhibits excellent inhibitory activity against EGFR, the heteroaryl derivative can be usefully used as a therapeutic agent for EGFR-associated diseases.
    Type: Application
    Filed: December 29, 2021
    Publication date: February 29, 2024
    Inventors: Yi Kyung Ko, Ah Reum Han, Jin Hee Park, Yeong Deok Lee, Hye Rim Im, Kyun Eun Kim, Dong Keun Hwang, Su Been Nam, Myung Hoe Heo, Se Rin Cho, Eun Hwa Ko, Sung Hwan Kim, Hwan Geun Choi
  • Patent number: 11495495
    Abstract: A method of manufacturing a semiconductor device includes forming a base layer on a substrate. A structure layer is Conned on the base layer. The structure layer includes at least one material layer. A structure pattern is formed on the base layer. The structure pattern includes a first trench extending in a first direction and a second trench having a cross portion extending in a second direction that is perpendicular to the first direction. The second trench is connected to the first trench. The structure pattern further includes a base pattern having a recess portion recessed downward from a surface of the base layer at the cross portion of the second trench.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: November 8, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Geun-Won Lim, Myung-Keun Lee, Seok-Cheon Baek, Kyeong-Jin Park
  • Publication number: 20210020510
    Abstract: A method of manufacturing a semiconductor device includes forming a base layer on a substrate. A structure layer is Conned on the base layer. The structure layer includes at least one material layer. A structure pattern is formed on the base layer. The structure pattern includes a first trench extending in a first direction and a second trench having a cross portion extending in a second direction that is perpendicular to the first direction. The second trench is connected to the first trench. The structure pattern further includes a base pattern having a recess portion recessed downward from a surface of the base layer at the cross portion of the second trench.
    Type: Application
    Filed: October 1, 2020
    Publication date: January 21, 2021
    Inventors: Geun-Won Lim, Myung-Keun Lee, Seok-Cheon Baek, Kyeong-Jin Park
  • Patent number: 10818547
    Abstract: A method of manufacturing a semiconductor device includes forming a base layer on a substrate. A structure layer is formed on the base layer. The structure layer includes at least one material layer. A structure pattern is formed on the base layer. The structure pattern includes a first trench extending in a first direction and a second trench having a cross portion extending in a second direction that is perpendicular to the first direction. The second trench is connected to the first trench. The structure pattern further includes a base pattern having a recess portion recessed downward from a surface of the base layer at the cross portion of the second trench.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: October 27, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Geun-Won Lim, Myung-Keun Lee, Seok-Cheon Baek, Kyeong-Jin Park
  • Publication number: 20190326169
    Abstract: A method of manufacturing a semiconductor device includes forming a base layer on a substrate. A structure layer is formed on the base layer. The structure layer includes at least one material layer. A structure pattern is formed on the base layer. The structure pattern includes a first trench extending in a first direction and a second trench having a cross portion extending in a second direction that is perpendicular to the first direction. The second trench is connected to the first trench. The structure pattern further includes a base pattern having a recess portion recessed downward from a surface of the base layer at the cross portion of the second trench.
    Type: Application
    Filed: October 18, 2018
    Publication date: October 24, 2019
    Inventors: GEUN-WON LIM, MYUNG-KEUN LEE, SEOK-CHEON BAEK, KYEONG-JIN PARK