Abstract: A method for manufacturing a biosensor includes forming a silicon nanowire channel, etching a first conductivity-type single crystalline silicon layer which is a top layer of a Silicon-On-Insulator (SOI) substrate to form a first conductivity-type single crystalline silicon line pattern, doping both sidewalls of the first conductivity-type single crystalline silicon line pattern with impurities of a second conductivity-type opposite to the first conductivity-type to form a second conductivity-type channel, forming second conductivity-type pads for forming electrodes at both ends of the first conductivity-type single crystalline silicon line pattern, forming, in an undoped region of the first conductivity-type single crystalline silicon line pattern, a first electrode for applying a reverse-bias voltage to insulate the first conductivity-type single crystalline silicon line pattern and the second conductivity-type channel from each other, and forming second electrodes for applying a bias voltage across the sec

Abstract: Provided are a thermoelectric device, a thermoelectric device module, and a method of forming the thermoelectric device. The thermoelectric device includes a first conductive type first semiconductor nanowire including at least one first barrier region; a second conductive type second semiconductor nanowire including at least one second barrier region; a first electrode connected to one end of the first semiconductor nanowire; a second electrode connected to one end of the second semiconductor nanowire; and a common electrode connected to the other end of the first semiconductor nanowire and the other end of the second semiconductor nanowire. The first barrier region is greater than the first semiconductor nanowire in thermal conductivity, and the second barrier region is greater than the second semiconductor nanowire in thermal conductivity.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: a single electron box including a first quantum dot, a charge storage gate on the first quantum dot, and a first gate electrode on the charge storage gate, the charge storage gate exchanging charges with the first quantum dot, the first gate electrode adjusting electric potential of the first quantum dot; and a single electron transistor including a second quantum dot below the first quantum dot, a source, a drain, and a second gate electrode below the second quantum dot, the second quantum dot being capacitively coupled to the first quantum dot, the source contacting one side of the second quantum dot, the drain contacting the other side facing the one side, the second gate electrode adjusting electric potential of the second quantum dot.

Abstract: Provided is a thermoelectric array including a plurality of thermoelectric elements arranged in m rows and n columns (each of m and n is an integer equal to or more than 1), each thermoelectric element including a heat absorption layer, a first heat sink layer, a second heat sink layer, a first-conductivity-type leg, and a second-conductivity-type leg formed on the same plane. The heat absorption layers of the thermoelectric elements adjacently disposed in a row or column direction are disposed adjacent to each other, and the first and second heat sink layers of the adjacent thermoelectric elements are disposed adjacent to each other. In this case, thermal interference between adjacent thermoelectric elements may be minimized, thereby obtaining a thermoelectric array having a high figure of merit.

Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.

Abstract: A Schottky barrier tunnel transistor includes a gate electrode, and source and drain regions. The gate electrode is formed over a channel region of a substrate to form a Schottky junction with the substrate. The source and drain regions are formed in the substrate exposed on both sides of the gate electrode.

Abstract: Provided are a semiconductor Field-Effect Transistor (FET) sensor and a method of fabricating the same. The method includes providing a semiconductor substrate, forming a sensor structure having a fin-shaped structure on the semiconductor substrate, injecting ions for electrical ohmic contact into the sensor structure, and depositing a metal electrode on the sensor structure, immobilizing a sensing material to be specifically combined with a target material onto both sidewall surfaces of the fin-shaped structure, and forming a passage on the sensor structure such that the target material passes through the fin-shaped structure.

Abstract: A Schottky barrier tunnel transistor includes a gate electrode, and source and drain regions. The gate electrode is formed over a channel region of a substrate to form a Schottky junction with the substrate. The source and drain regions are formed in the substrate exposed on both sides of the gate electrode.

Abstract: A method for manufacturing a biosensor device is provided. The method involves forming a silicon nanowire channel with a line width of several nanometers to several tens of nanometers using a typical photolithography process, and using the channel to manufacture a semiconductor nanowire sensor device.

Abstract: Provided is a method for fabricating a Schottky barrier tunnel transistor (SBTT) that can fundamentally prevent the generation of a gate leakage current caused by damage of spacers formed on both sidewalls of a gate electrode. The method for fabricating a Schottky barrier tunnel transistor, which includes: a) forming a silicon pattern and a sacrificial pattern on a buried oxide layer supported by a support substrate; b) forming a source/drain region on the buried oxide layer exposed on both sides of the silicon pattern, the source/drain region being formed of a metal layer and being in contact with both sidewalls of the silicon pattern; c) removing the sacrificial pattern to expose the top surface of the silicon pattern; and d) forming a gate insulating layer and a gate electrode on the exposed silicon pattern.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: a single electron box including a first quantum dot, a charge storage gate on the first quantum dot, and a first gate electrode on the charge storage gate, the charge storage gate exchanging charges with the first quantum dot, the first gate electrode adjusting electric potential of the first quantum dot; and a single electron transistor including a second quantum dot below the first quantum dot, a source, a drain, and a second gate electrode below the second quantum dot, the second quantum dot being capacitively coupled to the first quantum dot, the source contacting one side of the second quantum dot, the drain contacting the other side facing the one side, the second gate electrode adjusting electric potential of the second quantum dot.

Abstract: Provided are a thermoelectric device, a thermoelectric device module, and a method of forming the thermoelectric device. The thermoelectric device includes a first conductive type first semiconductor nanowire including at least one first barrier region; a second conductive type second semiconductor nanowire including at least one second barrier region; a first electrode connected to one end of the first semiconductor nanowire; a second electrode connected to one end of the second semiconductor nanowire; and a common electrode connected to the other end of the first semiconductor nanowire and the other end of the second semiconductor nanowire. The first barrier region is greater than the first semiconductor nanowire in thermal conductivity, and the second barrier region is greater than the second semiconductor nanowire in thermal conductivity.

Abstract: Provided is a method of manufacturing a semiconductor device including a high-k dielectric thin layer formed using an interfacial reaction. The method includes the steps of: forming an oxide layer on a silicon substrate; depositing a metal layer on the oxide layer to form a metal silicate layer using an interfacial reaction between the oxide layer and the metal layer; forming a metal gate by etching the metal silicate layer and the metal layer; and forming a lightly doped drain (LDD) region and source and drain regions in the silicon substrate after forming the metal gate. In this method, a semiconductor device having high quality and performance can be manufactured by a simpler process at lower cost.

Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.

Abstract: Provided are a biosensor using a silicon nanowire and a method of manufacturing the same. The silicon nanowire can be formed to have a shape, in which identical patterns are continuously repeated, to enlarge an area in which probe molecules are fixed to the silicon nanowire, thereby increasing detection sensitivity. In addition, the detection sensitivity can be easily adjusted by adjusting a gap between the identical patterns of the silicon nanowire depending on characteristics of target molecules, without adjusting a line width of the silicon nanowire in the conventional art. Further, the gap between the identical patterns of the silicon nanowire can be adjusted depending on characteristics of the target molecule to differentiate detection sensitivities, thereby simultaneously detecting various detection sensitivities.

Abstract: Provided are a semiconductor Field-Effect Transistor (FET) sensor and a method of fabricating the same. The method includes providing a semiconductor substrate, forming a sensor structure having a fin-shaped structure on the semiconductor substrate, injecting ions for electrical ohmic contact into the sensor structure, and depositing a metal electrode on the sensor structure, immobilizing a sensing material to be specifically combined with a target material onto both sidewall surfaces of the fin-shaped structure, and forming a passage on the sensor structure such that the target material passes through the fin-shaped structure.

Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.

Abstract: Provided is a method of manufacturing a semiconductor device including a high-k dielectric thin layer formed using an interfacial reaction. The method includes the steps of: forming an oxide layer on a silicon substrate; depositing a metal layer on the oxide layer to form a metal silicate layer using an interfacial reaction between the oxide layer and the metal layer; forming a metal gate by etching the metal silicate layer and the metal layer; and forming a lightly doped drain (LDD) region and source and drain regions in the silicon substrate after forming the metal gate. In this method, a semiconductor device having high quality and performance can be manufactured by a simpler process at lower cost.

Abstract: Provided is a method for fabricating a Schottky barrier tunnel transistor (SBTT) that can fundamentally prevent the generation of a gate leakage current caused by damage of spacers formed on both sidewalls of a gate electrode. The method for fabricating a Schottky barrier tunnel transistor, which includes: a) forming a silicon pattern and a sacrificial pattern on a buried oxide layer supported by a support substrate; b) forming a source/drain region on the buried oxide layer exposed on both sides of the silicon pattern, the source/drain region being formed of a metal layer and being in contact with both sidewalls of the silicon pattern; c) removing the sacrificial pattern to expose the top surface of the silicon pattern; and d) forming a gate insulating layer and a gate electrode on the exposed silicon pattern.

Abstract: A Schottky barrier tunnel transistor includes a gate electrode, and source and drain regions. The gate electrode is formed over a channel region of a substrate to form a Schottky junction with the substrate. The source and drain regions are formed in the substrate exposed on both sides of the gate electrode.