Patents by Inventor Myung-Sung Kang
Myung-Sung Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240132357Abstract: An embodiment of the present specification provides a method for preparing a catalyst for preparing a carbon nanotube, comprising: (a) dissolving a main catalyst precursor, a support precursor, a cocatalyst precursor and a precipitation inhibitor in a solvent to prepare a precursor solution; and (b) pyrolyzing the precursor solution by spraying the precursor solution into a reactor, wherein a mole fraction of the precipitation inhibitor to the cocatalyst precursor is 0.1 to 1.5.Type: ApplicationFiled: October 19, 2023Publication date: April 25, 2024Applicant: KOREA KUMHO PETROCHEMICAL CO., LTD.Inventors: Myung Hoon JEONG, Hyun Tae KIM, Sang Hyo RYU, Chung Heon JEONG, Wan Sung LEE, Woo Ram JUNG, Chang Gu KANG
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Publication number: 20240083384Abstract: A vehicle seat reinforcement device includes a leg portion mounted on a floor panel, a seat cushion frame slidably mounted on the leg portion, and a load reinforcing structure connected between the leg portion and the seat cushion frame, wherein when a seat belt anchorage load is transferred to the seat cushion frame, the seat cushion frame is locked to the leg portion by the load reinforcing structure.Type: ApplicationFiled: February 3, 2023Publication date: March 14, 2024Applicants: Hyundai Motor Company, Kia Corporation, Daechang Seat Co.,LTD-Dongtan, Hyundai Transys Inc.Inventors: Sang Soo LEE, Chan Ho JUNG, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Deok Soo LIM, Sang Do PARK, In Sun BAEK, Sin Chan YANG, Chan Ki CHO, Myung Soo LEE, Jae Yong JANG, Jun Sik HWANG, Ho Sung KANG, Hae Dong KWAK, Hyun Tak KO
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Patent number: 11656148Abstract: An elastic material vibration test apparatus includes a lower support plate having an upper surface on which an elastic material to be tested is placed, an upper support plate disposed above the lower support plate to be spaced apart from the lower support plate, a pillar connecting the lower support plate and the upper support plate, a pressing rod configured to pass through the upper support plate and ascend and descend in a vertical direction, an air bearing installed on the upper support plate and supporting an outer surface of the pressing rod in a non-contact state, a pressing plate coupled to a lower end of the pressing rod to press an upper surface of the elastic material, and one or more weights coupled to the pressing rod above the air bearing.Type: GrantFiled: December 7, 2020Date of Patent: May 23, 2023Assignees: Hyundai Motor Company, Kia Motors CorporationInventors: Byungguk Lim, Chang Hoon Lee, Myung Sung Kang, Ji Young Yeom
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Publication number: 20220246491Abstract: An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.Type: ApplicationFiled: April 22, 2022Publication date: August 4, 2022Inventors: Joungphil LEE, Myung-Sung KANG, Yeongseok KIM, Gwangsun SEO, Hyein YOO, Yongwon CHOI
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Patent number: 11355413Abstract: An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.Type: GrantFiled: August 14, 2019Date of Patent: June 7, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Joungphil Lee, Myung-Sung Kang, Yeongseok Kim, Gwangsun Seo, Hyein Yoo, Yongwon Choi
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Publication number: 20210356353Abstract: An elastic material vibration test apparatus includes a lower support plate having an upper surface on which an elastic material to be tested is placed, an upper support plate disposed above the lower support plate to be spaced apart from the lower support plate, a pillar connecting the lower support plate and the upper support plate, a pressing rod configured to pass through the upper support plate and ascend and descend in a vertical direction, an air bearing installed on the upper support plate and supporting an outer surface of the pressing rod in a non-contact state, a pressing plate coupled to a lower end of the pressing rod to press an upper surface of the elastic material, and one or more weights coupled to the pressing rod above the air bearing.Type: ApplicationFiled: December 7, 2020Publication date: November 18, 2021Inventors: Byungguk Lim, Chang Hoon Lee, Myung Sung Kang, Ji Young Yeom
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Patent number: 10923465Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.Type: GrantFiled: May 21, 2019Date of Patent: February 16, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Won-Gi Chang, Dongwon Lee, Myung-Sung Kang, Hyein Yoo
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Patent number: 10910339Abstract: A flip chip bonding method includes obtaining a die including a first substrate and an adhesive layer on the first substrate; bonding the die to a second substrate different from the first substrate; and curing the adhesive layer. The curing the adhesive layer includes heating the second substrate to melt the adhesive layer, and providing the adhesive layer and the second substrate with air having pressure greater than atmospheric pressure.Type: GrantFiled: August 6, 2019Date of Patent: February 2, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Hwail Jin, Yongwon Choi, Myung-Sung Kang, Yeongseok Kim, Wonkeun Kim
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Publication number: 20200211920Abstract: An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.Type: ApplicationFiled: August 14, 2019Publication date: July 2, 2020Inventors: Joungphil LEE, Myung-Sung KANG, Yeongseok KIM, Gwangsun SEO, Hyein YOO, Yongwon CHOI
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Publication number: 20200058615Abstract: A flip chip bonding method includes obtaining a die including a first substrate and an adhesive layer on the first substrate; bonding the die to a second substrate different from the first substrate; and curing the adhesive layer. The curing the adhesive layer includes heating the second substrate to melt the adhesive layer, and providing the adhesive layer and the second substrate with air having pressure greater than atmospheric pressure.Type: ApplicationFiled: August 6, 2019Publication date: February 20, 2020Inventors: HWAIL JIN, YONGWON CHOI, MYUNG-SUNG KANG, YEONGSEOK KIM, WONKEUN KIM
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Patent number: 10446525Abstract: A semiconductor package includes a first semiconductor chip including a first through-silicon via (TSV), a second semiconductor chip stacked on the first semiconductor chip and including a second TSV, and a non-conductive film formed between the first semiconductor chip and the second semiconductor chip. The non-conductive film includes two layers having different viscosities.Type: GrantFiled: July 31, 2018Date of Patent: October 15, 2019Assignee: Samsung Electronic Co., Ltd.Inventors: Yong-won Choi, Won-keun Kim, Myung-sung Kang, Gwang-sun Seo
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Publication number: 20190273075Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.Type: ApplicationFiled: May 21, 2019Publication date: September 5, 2019Inventors: Won-Gi Chang, Dongwon Lee, Myung-Sung Kang, Hyein Yoo
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Patent number: 10354985Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.Type: GrantFiled: February 21, 2017Date of Patent: July 16, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Won-Gi Chang, Dongwon Lee, Myung-Sung Kang, Hyein Yoo
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Publication number: 20180350779Abstract: A semiconductor package includes a first semiconductor chip including a first through-silicon via (TSV), a second semiconductor chip stacked on the first semiconductor chip and including a second TSV, and a non-conductive film formed between the first semiconductor chip and the second semiconductor chip. The non-conductive film includes two layers having different viscosities.Type: ApplicationFiled: July 31, 2018Publication date: December 6, 2018Inventors: Yong-won CHOI, Won-keun KIM, Myung-sung KANG, Gwang-sun SEO
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Patent number: 10043780Abstract: A semiconductor package includes a first semiconductor chip including a first through-silicon via (TSV), a second semiconductor chip stacked on the first semiconductor chip and including a second TSV, and a non-conductive film formed between the first semiconductor chip and the second semiconductor chip. The non-conductive film includes two layers having different viscosities.Type: GrantFiled: February 16, 2017Date of Patent: August 7, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yong-won Choi, Won-keun Kim, Myung-sung Kang, Gwang-sun Seo
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Patent number: 9991234Abstract: A semiconductor package includes a substrate, a plurality of semiconductor chips stacked on the substrate, and a plurality of bonding layers bonded to lower surfaces of the plurality of semiconductor chips. The plurality of bonding layers may be divided into a plurality of groups, each having different physical properties depending on a distance from the substrate.Type: GrantFiled: January 9, 2017Date of Patent: June 5, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Gwang Sun Seo, Myung Sung Kang, Won Keun Kim, Jin Woo Park, Yong Won Choi
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Publication number: 20180012866Abstract: A semiconductor package includes a first semiconductor chip including a first through-silicon via (TSV), a second semiconductor chip stacked on the first semiconductor chip and including a second TSV, and a non-conductive film formed between the first semiconductor chip and the second semiconductor chip. The non-conductive film includes two layers having different viscosities.Type: ApplicationFiled: February 16, 2017Publication date: January 11, 2018Inventors: Yong-won CHOI, Won-keun KIM, Myung-sung KANG, Gwang-sun SEO
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Publication number: 20170365591Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.Type: ApplicationFiled: February 21, 2017Publication date: December 21, 2017Inventors: WON-GI CHANG, DONGWON LEE, MYUNG-SUNG KANG, HYEIN YOO
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Publication number: 20170365582Abstract: A semiconductor package includes a substrate, a plurality of semiconductor chips stacked on the substrate, and a plurality of bonding layers bonded to lower surfaces of the plurality of semiconductor chips. The plurality of bonding layers may be divided into a plurality of groups, each having different physical properties depending on a distance from the substrate.Type: ApplicationFiled: January 9, 2017Publication date: December 21, 2017Inventors: Gwang Sun Seo, Myung Sung Kang, Won Keun Kim, Jin Woo Park, Yong Won Choi
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Patent number: 8958011Abstract: Bi-directional camera modules and flip chip bonders including the same are provided. The module includes a circuit board on which an upper sensor and a lower sensor are mounted, an upper lens and a lower lens disposed on the upper sensor and under the lower sensor, respectively, and a housing fixing the upper lens and the lower lens spaced apart from the upper sensor and the lower sensor, respectively. The housing surrounds the circuit board. The housing has a plurality of inlets and an outlet through which air flows, and the housing has an air passage connected from the inlets to the outlet via a space between lower lens and the lower sensor.Type: GrantFiled: March 14, 2013Date of Patent: February 17, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Sick Park, Myung-Sung Kang, Ji-Seok Hong