Patents by Inventor N. David Theodore

N. David Theodore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7153761
    Abstract: A method for transferring a thin semiconductor layer from one substrate to another substrate involves depositing a thin epitaxial monocrystalline semiconductor layer on a substrate having surface contaminants. An interface that includes the contaminants is formed in between the deposited layer and the substrate. Hydrogen atoms are introduced into the structure and allowed to diffuse to the interface. Afterward, the thin semiconductor layer is bonded to a second substrate and the thin layer is separated away at the interface, which results in transferring the thin epitaxial semiconductor layer from one substrate to the other substrate.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: December 26, 2006
    Assignee: Los Alamos National Security, LLC
    Inventors: Michael A. Nastasi, Lin Shao, N. David Theodore
  • Patent number: 5565690
    Abstract: A method for doping a strained heterojunction semiconductor device includes heating a substrate (16) having a strained mono-crystalline semiconductor region (22) to a temperature above room temperature. While the substrate (16) is heated, dopants are ion implanted into the strained mono-crystalline semiconductor region (22) to minimize implant related damage. Thereafter the substrate (16) is heated under non-steady state conditions for a time sufficient to activate the implanted dopant and anneal implant related damage while minimizing relaxation of the strained heterojunction.
    Type: Grant
    Filed: February 2, 1995
    Date of Patent: October 15, 1996
    Assignee: Motorola, Inc.
    Inventors: N. David Theodore, Donald Y. C. Lie, T. C. Smith, John W. Steele
  • Patent number: 5498578
    Abstract: A method for selectively forming semiconductor regions (28) is provided, by exposing a patterned substrate (21) having exposed regions of semiconductor material (26,27) and exposed regions of oxide (24) to a first temperature and a semiconductor source-gas and hydrogen in an atmosphere substantially absent halogens, a blanket semiconductor layer (28,29) forms over the exposed regions of semiconductor material (26,27) and oxide (24). By further exposing the patterned substrate (21) to a second temperature higher than the first temperature in a hydrogen atmosphere, polycrystalline semiconductor material (29) formed over the exposed oxide regions (24) is selectively removed leaving that portion of the blanket semiconductor layer (28) over the exposed regions of semiconductor material (26,27). The method is suitable for forming isolated regions of semiconductor material for fabricating semiconductor devices and is not load dependent.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: March 12, 1996
    Assignee: Motorola, Inc.
    Inventors: John W. Steele, Edouard de Fresart, N. David Theodore
  • Patent number: 5436180
    Abstract: One preferred method for making a semiconductor structure includes altering the direction, and optionally the position, of a polycrystalline grain boundary (38) in a base layer (17,21) of an epitaxial base bipolar transistor (10). Altering the grain boundary (38) may be accomplished by annealing the semiconductor structure after the layer, which later forms the lower portion of the base (17), has been deposited. Altering the grain boundary (38) has a significant effect in reducing base resistance (R.sub.bx1, R.sub.bx2). Reduced base resistance (R.sub.bx1, R.sub.bx2) dramatically improves device performance.
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: July 25, 1995
    Assignee: Motorola, Inc.
    Inventors: Edouard D. de Fresart, John W. Steele, N. David Theodore
  • Patent number: 5338932
    Abstract: The topography of a surface is measured by utilizing a probe (10, 20) having a variable flexibility and a conductive tip (14, 16). Using the conductive tip (14, 16), a first tunneling current is measured at a first point (36). The tip (14, 16) is moved to a second point (37) and a deflection force is measured. The measurements from the different points (36, 37, 38, 39, 40, 41) are combined to provide composite images of the surface's topography and material composition.
    Type: Grant
    Filed: January 4, 1993
    Date of Patent: August 16, 1994
    Assignee: Motorola, Inc.
    Inventors: N. David Theodore, Juan P. Carrejo
  • Patent number: 5326971
    Abstract: An environmental chamber for a transmission electron microscope, in which a specimen is held in position within the transmission electron microscope so an electron beam passes through the specimen to a detector. A removable sleeve surrounds the specimen holder and is sealed at both ends by a seal between the removable sleeve and the specimen holder to form a differential pressure chamber. Apertures are formed in the removable sleeve allowing the electron beam to pass through the specimen to the detector. A vacuum line allows gases to be removed from the differential chamber. A reactive inlet line extends into the differential chamber to allow a material to be introduced onto the specimen.
    Type: Grant
    Filed: May 17, 1993
    Date of Patent: July 5, 1994
    Assignee: Motorola, Inc.
    Inventors: N. David Theodore, Juan P. Carrejo