Patents by Inventor Na SUI

Na SUI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12287540
    Abstract: Provided is an array substrate. The array substrate us provided with a display region and a non-display region on a periphery of the display region, and includes: a base substrate; a pixel electrode and a thin-film transistor on a side of the base substrate, wherein the pixel electrode and the thin-film transistor are disposed in the display region, and the pixel electrode is disposed on a side, facing away from the base substrate, of the thin-film transistor; a first passivation layer between the pixel electrode and the thin-film transistor, wherein a plurality of first vias are defined in the first passivation layer; and a second passivation layer on a side, facing away from the base substrate, of the pixel electrode, wherein a plurality of second vias are defined in the second passivation layer.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: April 29, 2025
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE Technology Group Co., Ltd.
    Inventors: Ting Wan, Ruifang Du, Chengyong Zhan, Na Sui, Yanlong Li
  • Publication number: 20250035972
    Abstract: Provided is an array substrate. The array substrate us provided with a display region and a non-display region on a periphery of the display region, and includes: a base substrate; a pixel electrode and a thin-film transistor on a side of the base substrate, wherein the pixel electrode and the thin-film transistor are disposed in the display region, and the pixel electrode is disposed on a side, facing away from the base substrate, of the thin-film transistor; a first passivation layer between the pixel electrode and the thin-film transistor, wherein a plurality of first vias are defined in the first passivation layer; and a second passivation layer on a side, facing away from the base substrate, of the pixel electrode, wherein a plurality of second vias are defined in the second passivation layer.
    Type: Application
    Filed: August 31, 2022
    Publication date: January 30, 2025
    Inventors: Ting WAN, Ruifang DU, Chengyong ZHAN, Na SUI, Yanlong LI
  • Publication number: 20210382463
    Abstract: The present disclosure discloses a material assignment method and system and a computer equipment readable storage medium. The material assignment method includes: acquiring a product structure and a target process list associated with the product structure, the product structure including identifications of materials required for manufacturing a product, and the target process list including operating steps of processes required in manufacturing the product; generating a material assignment process list of the product by automatically obtaining materials required to be assigned to respective operating steps in the processes of manufacturing the product based on a preset rule and according to the product structure and the target process list associated with the product structure; and generating a standard operating procedure of the product according to the material assignment process list of the product.
    Type: Application
    Filed: December 26, 2019
    Publication date: December 9, 2021
    Inventors: Yunxia LIU, Na SUI, Jiangbo LUO, Jieli WANG, Zhenggang HU, Zhengfang FAN