Patents by Inventor Na Xing

Na Xing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9623111
    Abstract: A pegylated artesunate derivative, a pharmaceutical composition and uses thereof, the pegylated artesunate derivative is represented by the general formula (I): The pegylated artesunate derivative has activity comparable to that of artesunate, increased water solubility and stability, and an extended half-life in vivo.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: April 18, 2017
    Assignees: KPC Pharmaceuticals, Inc., Institute of Pharmacology and Toxicology Academy of Military Medical Science P.L.A. CHINA
    Inventors: Sicheng Li, Qingbin Meng, Junwen Mao, Jinfeng Li, An Xu, Jia Liu, Yuanjun Liang, Qiyan Jia, Jiufeng Yan, Xiaoyang Shen, Hui Liu, Na Xing
  • Publication number: 20160250339
    Abstract: A pegylated artesunate derivative, a pharmaceutical composition and uses thereof, the pegylated artesunate derivative is represented by the general formula (I): The pegylated artesunate derivative has activity comparable to that of artesunate, increased water solubility and stability, and an extended half-life in vivo.
    Type: Application
    Filed: April 12, 2013
    Publication date: September 1, 2016
    Applicants: Beijing Kaizheng Biotech Development Co. LTD, Institute of Pharmacology and Toxicology Academy of Military Medical Sciences PLA China, Institute of Pharmacology and Toxicology Academy of Military Medical Sciences PLA China
    Inventors: Sicheng Li, Qingbin Meng, Junwen Mao, Jinfeng Li, An Xu, Jia Liu, Yuanjun Liang, Qiyan Jia, Jiufeng Yan, Xiaoyang Shen, Hui Liu, Na Xing
  • Patent number: 9202005
    Abstract: A design verification workstation contains both debug and constraint solver capabilities during simulation of a design under test. The design verification workstation is configured to allow the user to debug constraints, stop the constraint solver, navigate problems and variables, and make modifications on-the fly during the simulation to constraint information. Additionally, in some embodiments, the design verification workstation may allow a user to use a constraint solver to experiment if the modifications will lead to desired test stimulus. Since this debug process happens during simulation, users do not need to recompile the test case. Additionally, once a user is satisfied with the modifications made to the simulation, the modification could be saved for future usage.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: December 1, 2015
    Assignee: SYNOPSYS, INC.
    Inventors: Dhiraj Goswami, Aijun Hu, Na Xing, Jason Chung-Shih Chen, Ngai Ngai William Hung
  • Publication number: 20150067622
    Abstract: A design verification workstation contains both debug and constraint solver capabilities during simulation of a design under test. The design verification workstation is configured to allow the user to debug constraints, stop the constraint solver, navigate problems and variables, and make modifications on-the fly during the simulation to constraint information. Additionally, in some embodiments, the design verification workstation may allow a user to use a constraint solver to experiment if the modifications will lead to desired test stimulus. Since this debug process happens during simulation, users do not need to recompile the test case. Additionally, once a user is satisfied with the modifications made to the simulation, the modification could be saved for future usage.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 5, 2015
    Inventors: Dhiraj Goswami, Aijun Hu, Na Xing, Jason Chung-Shih Chen, Ngai Ngai William Hung