Abstract: A semiconductor device includes a change detection circuit and a change determination circuit. The change detection circuit generates a detection voltage having a voltage level varied in accordance with a change of a transistor. The change determination circuit enables a determination signals based on the voltage level of the detection voltage.

Abstract: A semiconductor device may include a change detection circuit and a change determination circuit. The change detection circuit may be configured to generate a detection voltage having a voltage level varied in accordance with a change of a transistor. The change determination circuit may be configured to enable any one of a plurality of determination signals based on the voltage level of the detection voltage.

Abstract: A semiconductor memory device may include: a memory cell array including first and second word lines coupled to first and second memory cells, respectively; a word line driving unit suitable for selectively driving the first and second word lines; and a test control unit suitable for enabling the first word line to write test data to the first memory cell, and enabling the second word line to write the test data to the second memory cell, during a test operation.

Abstract: A semiconductor memory device may include: a memory cell array including first and second word lines coupled to first and second memory cells, respectively; a word line driving unit suitable for selectively driving the first and second word lines; and a test control unit suitable for enabling the first word line to write test data to the first memory cell, and enabling the second word line to write the test data to the second memory cell, during a test operation.

Abstract: An internal voltage control circuit according to an embodiment may include a source power supply selection unit configured to receive a first internal power supply voltage and a second internal power supply voltage and selecting the first internal power supply voltage and the second internal power supply voltage as a source voltage in response to a test mode enable signal, a first reference voltage generation unit configured to receive the source voltage from the source power supply selection unit, and configured to generate a to first low reference voltage and a first high reference voltage. The reference voltage control circuit may also include a second reference voltage generation unit configured to receive the first internal power supply voltage and configured to generate a second low reference voltage and a second high reference voltage.

Abstract: An internal voltage control circuit according to an embodiment may include a source power supply selection unit configured to receive a first internal power supply voltage and a second internal power supply voltage and selecting the first internal power supply voltage and the second internal power supply voltage as a source voltage in response to a test mode enable signal, a first reference voltage generation unit configured to receive the source voltage from the source power supply selection unit, and configured to generate a to first low reference voltage and a first high reference voltage. The reference voltage control circuit may also include a second reference voltage generation unit configured to receive the first internal power supply voltage and configured to generate a second low reference voltage and a second high reference voltage.

Abstract: Provided is an analog-to-digital (A/D) converter that may be used in an image sensor and a ramp signal generator that is used in an A/D converter. The ramp signal generator may generate a ramp signal and a reference voltage signal that include noise that has same noise characteristics that are input into the ramp signal, such that the signal to noise ratio (SNR) is improved and the image quality is also improved.

Abstract: Provided is an analog-to-digital (A/D) converter that may be used in an image sensor and a ramp signal generator that is used in an A/D converter. The ramp signal generator may generate a ramp signal and a reference voltage signal that include noise that has same noise characteristics that are input into the ramp signal, such that the signal to noise ratio (SNR) is improved and the image quality is also improved.