Abstract: Frame buffer video compression on an input video stream to efficiently allocate and utilize memory used for storing reference frames in a video decoder includes parsing a video header to obtain a maximum number of reference frames (N), dividing an available frame buffer memory to hold [N+1] compressed frames, controlling a compression process to limit a size of each frame such that said size is not less than a frame buffer memory size divided by [N+1], parsing messages that contain reference frames by looking ahead in an input video stream buffer of the input video stream, and allocating memory for compressing a given reference frame based on a number of needed frames at a frame buffer. A quantization of the compression process may be adjusted to improve a picture quality of the input video stream.

Abstract: A digital front-end architecture for television receivers with sigma-delta ADC input. An input digital signal is fed to the architecture and the gain is controlled by a gain stage. In the first method, the gain stage is controlled by a first AGC. Here, the gain is increased if the first threshold value is larger than the magnitude of a complex phase-locked loop (CPLL) output, and the gain is decreased if the first threshold value is lower than the magnitude of the CPLL output. In the second method, the gain is controlled through a second AGC. The gain is controlled by increasing the gain if the second threshold value is larger than a line peak of the moving average filter output, and the gain is decreased if the second threshold value is lower than the peak. The second threshold value and the peak are compared in a peak search block.

Abstract: An optimized semiconductor chip pad configuration. The pad includes a pad circuit area Ap, a first dimension x and a second dimension y, in a chip having N number of pins on each side. The pins include a longitudinal axis, and the chip includes a chip core of length Lc. The method includes determining the first dimension x by dividing the length Lc by the N, determining the second dimension y by dividing the pad circuit area Ap by a result of a division of the length Lc by the N, and creating a semiconductor area pad that includes pins with the longitudinal axis positioned parallel to the chip core. A stack of circuits is designed in the chip to fit in the pad based on the first dimension x and the second dimension y.

Abstract: An optimized semiconductor chip pad configuration. The pad includes a pad circuit area Ap, a first dimension x and a second dimension y, in a chip having N number of pins on each side. The pins include a longitudinal axis, and the chip includes a chip core of length Lc. The method includes determining the first dimension x by dividing the length Lc by the N, determining the second dimension y by dividing the pad circuit area Ap by a result of a division of the length Lc by the N, and creating a semiconductor area pad that includes pins with the longitudinal axis positioned parallel to the chip core. A stack of circuits is designed in the chip to fit in the pad based on the first dimension x and the second dimension y.

Abstract: Performing real-time compression on an image for target buffer fullness includes dividing the image into N macro-blocks, performing a discrete cosine transformation (DCT) on each of the N macro-blocks, defining a Quantization Parameter Scalar (Q) for each of the N macro-blocks of the image on the DCT being performed, initializing the Quantization Parameter Scalar (Q) for the first Macro-block to a value that correlates to a buffer fullness of a previously compressed image, and monitoring the buffer fullness by comparing the buffer fullness with the target buffer fullness. The N macro-blocks include 16×16 macro-blocks. The Q value is increased to a first new value when the buffer fullness is greater than the target buffer fullness. The Q value is decreased to a second new value when the buffer fullness is less than the target buffer fullness.

Abstract: A digital front-end architecture for television receivers with sigma-delta ADC input. An input digital signal is fed to the architecture and the gain is controlled by a gain stage. In the first method, the gain stage is controlled by a first AGC. Here, the gain is increased if the first threshold value is larger than the magnitude of a complex phase-locked loop (CPLL) output, and the gain is decreased if the first threshold value is lower than the magnitude of the CPLL output. In the second method, the gain is controlled through a second AGC. The gain is controlled by increasing the gain if the second threshold value is larger than a line peak of the moving average filter output, and the gain is decreased if the second threshold value is lower than the peak. The second threshold value and the peak are compared in a peak search block.

Abstract: A technique for optimizing a prediction method of samples in blocks of an image is provided. The image includes a first block, a second block, a third block, and a fourth block, each of the blocks include 8×8 blocks and form one Macro block. The method includes performing a prediction of the second block, the third block and the fourth block by performing at least one of prediction methods. A prediction error per block (Pe) is computed for each prediction method that is performed to predict the second block, the third block, and the fourth block. The prediction error per block (Pe) equals an original block value minus a predicted block value. An optimal prediction method is chosen from each of the prediction methods performed that results in minimum ?|Pe| pixels per block (summation on pixels per block). The optimal prediction method and the Pe for each block are stored.

Abstract: Frame buffer video compression on an input video stream to efficiently allocate and utilize memory used for storing reference frames in a video decoder includes parsing a video header to obtain a maximum number of reference frames (N), dividing an available frame buffer memory to hold [N+1] compressed frames, controlling a compression process to limit a size of each frame such that said size is not less than a frame buffer memory size divided by [N+1], parsing messages that contain reference frames by looking ahead in an input video stream buffer of the input video stream, and allocating memory for compressing a given reference frame based on a number of needed frames at a frame buffer. A quantization of the compression process may be adjusted to improve a picture quality of the input video stream.

Abstract: Reducing a frame size in a memory for a receiver includes compressing a first analog television picture frame, storing the compressed frame in the memory, decompressing the compressed frame from the memory, obtaining a second analog television picture frame. The first frame includes a first set of pixels that further include at least one of Red/Green/Blue (RGB) samples and, the second frame includes a second set of pixels. Each of the first set of pixels of first frame being decompressed are compared with the corresponding second set of pixels of second frame to obtain an alpha (?) factor. A Signal to Noise Ratio (SNR) and a motion per pixel of the first set of pixels and the second set of pixels are compared. Each of a pixel is displayed based on the ? factor.

Abstract: An apparatus and method for equalizing analog TV signals includes an antenna that receives the signal data, wherein the signal data comprises a luminance carrier comprising a luminance channel and a chrominance carrier comprising a chrominance channel; an analog-to-digital converter coupled to receiving antenna that converts the received signal data to digital signal data; an instruction memory storing digital equalizer instructions; and a digital equalizer system, coupled to the memory and the analog-to-digital converter, wherein the digital equalizer system processes the digital equalizer instructions to estimate a noise variation of the luminance channel; equalize the luminance channel; and equalize the chrominance channel, wherein the equalization of the chrominance channel is separate and distinct from the equalization of the luminance channel.

Abstract: An apparatus and a method for adaptive filtering includes an antenna that receives analog video broadcast signal data; an analog-to-digital converter coupled to the antenna and converting the received analog video broadcast signal data to digital video signal data; a frame buffer memory storing the digital video signal data; an instruction memory storing adaptive filtering instructions; and an adaptive filter coupled to the memory and the analog-to-digital converter, wherein the adaptive filter: reads the adaptive filter instructions from the memory; executes the adaptive filter instructions; averages an input pixel with a corresponding pixel stored in the frame buffer memory; calculates a forgetting factor for each pixel in the plurality of pixel values stored in the frame buffer memory; and filters noise from each pixel of the plurality of pixel values stored in the frame buffer memory based on the forgetting factor.

Abstract: A system and method for downscaling signal data, where the system includes an antenna receiving video signal data; an analog-to-digital converter coupled to the antenna and converting the received analog signal data to digital signal data; a memory storing video downscaling instructions; and a video downscaling processor, coupled to the memory and the analog-to-digital converter, wherein the video downscaling processor, upon reading the video downscaling instructions from the memory and executing the downscaling instructions: divides the digital video signal data into a plurality of blocks, wherein each block comprises a plurality of pixel elements; and cycles through the plurality of blocks, and for every block in the plurality of blocks, generates a new block, wherein the new block comprises a plurality of new pixels evenly spaced within the new block.

Abstract: A method for correlating scattered pilot locations in a sequence of OFDM symbols in a multi-carrier transmission system, and includes mapping pilot locations comprising pilot symbols having predetermined known values, wherein the pilot symbols are positioned among data subcarriers in time and frequency dimensions consisting of received pilot symbols and having a predetermined position pattern in the time and frequency dimensions, wherein the predetermined position pattern comprises a finite number of sub-position patterns each corresponding to positions of the pilot symbols; estimating a Doppler spread in a frequency spectrum between the transmitter and the receiver in the multi-carrier transmission system; estimating a channel length of a set of channel paths received at the receiver; and the receiver automatically selecting one of a plurality of predetermined methods of correlating the scattered pilot locations in the sequence of OFDM symbols based only on the estimating processes.

Abstract: A method for correlating scattered pilot locations in a sequence of OFDM symbols in a multi-carrier transmission system, and includes mapping pilot locations comprising pilot symbols having predetermined known values, wherein the pilot symbols are positioned among data subcarriers in time and frequency dimensions consisting of received pilot symbols and having a predetermined position pattern in the time and frequency dimensions, wherein the predetermined position pattern comprises a finite number of sub-position patterns each corresponding to positions of the pilot symbols; estimating a Doppler spread in a frequency spectrum between the transmitter and the receiver in the multi-carrier transmission system; estimating a channel length of a set of channel paths received at the receiver; and the receiver automatically selecting one of a plurality of predetermined methods of correlating the scattered pilot locations in the sequence of OFDM symbols based only on the estimating processes.

Abstract: A method for correlating scattered pilot locations in a sequence of OFDM symbols in a multi-carrier transmission system, and includes mapping pilot locations comprising pilot symbols having predetermined known values, wherein the pilot symbols are positioned among data subcarriers in time and frequency dimensions consisting of received pilot symbols and having a predetermined position pattern in the time and frequency dimensions, wherein the predetermined position pattern comprises a finite number of sub-position patterns each corresponding to positions of the pilot symbols; estimating a Doppler spread in a frequency spectrum between the transmitter and the receiver in the multi-carrier transmission system; estimating a channel length of a set of channel paths received at the receiver; and the receiver automatically selecting one of a plurality of predetermined methods of correlating the scattered pilot locations in the sequence of OFDM symbols based only on the estimating processes.

Abstract: A method for correlating scattered pilot locations in a sequence of OFDM symbols in a multi-carrier transmission system, and includes mapping pilot locations comprising pilot symbols having predetermined known values, wherein the pilot symbols are positioned among data subcarriers in time and frequency dimensions consisting of received pilot symbols and having a predetermined position pattern in the time and frequency dimensions, wherein the predetermined position pattern comprises a finite number of sub-position patterns each corresponding to positions of the pilot symbols; estimating a Doppler spread in a frequency spectrum between the transmitter and the receiver in the multi-carrier transmission system; estimating a channel length of a set of channel paths received at the receiver; and the receiver automatically selecting one of a plurality of predetermined methods of correlating the scattered pilot locations in the sequence of OFDM symbols based only on the estimating processes.