Patents by Inventor Nachiketh Potlapally

Nachiketh Potlapally has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SECURITY ZONE POLICY ENFORCEMENT IN A CLOUD INFRASTRUCTURE SYSTEM
    Publication number: 20230328114
    Abstract: A cloud-based security solution that provides a robust and secure framework for managing and enforcing security policies related to various resources managed in the cloud is disclosed. The cloud-based security solution is implemented by a security zone policy enforcement system in a cloud service provider infrastructure. The system receives a request to perform an operation on a resource and determines a compartment associated with the resource. The system determines that the compartment is associated with a security zone and determines a set of one or more security zone policies applicable to the resource. The system then determines that the operation on the resource is permitted based on the set of one or more security zone policies and responsive to determining that the operation on the resource is permitted, allows the operation to be performed on the resource.
    Type: Application
    Filed: June 5, 2023
    Publication date: October 12, 2023
    Applicant: Oracle International Corporation
    Inventors: Igor Dozorets, Thoulfekar Alrahem, Jun Tong, Leonid Kuperman, Nachiketh Potlapally, Bala Ganesh Chandran, Brian Pratt, Nathaniel Martin Glass, Girish Nagaraja, Jonathan Jorge Nadal
  • Power mode based macro-models for power estimation of electronic circuits
    Patent number: 6735744
    Abstract: A method of creating models for power estimation of a circuit comprising generating an input space for the circuit. The input space is separated into multiple power modes corresponding to regions that display similar power behavior. Separate power models are generated for each of said multiple power modes. A power mode identification function is created that selects an appropriate power model from the separate power models based on the present and past values of the circuit inputs.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: May 11, 2004
    Assignee: NEC Corporation
    Inventors: Anand Raghunathan, Ganesh Lakshminarayana, Nachiketh Potlapally, Michael S. Hsiao, Srimat T. Chakradhar
  • Techniques for efficient security processing
    Publication number: 20030142818
    Abstract: A programmable security processor for efficient execution of security protocols, wherein the instruction set of the processor is enhanced to contain at least one instruction that is used to improve the efficiency of a public-key cryptographic algorithm, and at least one instruction that is used to improve the efficiency of a private-key cryptographic algorithm.
    Type: Application
    Filed: September 30, 2002
    Publication date: July 31, 2003
    Applicant: NEC USA, INC.
    Inventors: Anand Raghunathan, Srivaths Ravi, Nachiketh Potlapally, Srimat Chakradhar, Murugan Sankaradas
  • Power mode based macro-models for power estimation of electronic circuits
    Publication number: 20020133792
    Abstract: A method of creating models for power estimation of a circuit comprising generating an input space for the circuit. The input space is separated into multiple power modes corresponding to regions that display similar power behavior. Separate power models are generated for each of said multiple power modes. A power mode identification function is created that selects an appropriate power model from the separate power models based on the present and past values of the circuit inputs.
    Type: Application
    Filed: December 13, 2001
    Publication date: September 19, 2002
    Applicant: NEC USA, INC.
    Inventors: Anand Raghunathan, Ganesh Lakshminarayana, Nachiketh Potlapally, Michael S. Hsiao, Srimat T. Chakradhar