Patents by Inventor Nack Hyun KIM

Nack Hyun KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11927623
    Abstract: A semiconductor test device may include a chamber, a plurality of slots, a plurality of test boards and a plurality of temperature control modules. The slots may be arranged in the chamber. The test boards may be inserted into a part of the slots. The test boards may be configured to receive a plurality of semiconductor devices. The temperature control modules and the test boards may be alternately inserted into other parts of the slots. The temperature control modules may be configured to provide each of the test boards with air having a set temperature.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: March 12, 2024
    Assignee: SK hynix Inc.
    Inventor: Nack Hyun Kim
  • Publication number: 20230133368
    Abstract: A semiconductor test device may include a chamber, a plurality of slots, a plurality of test boards and a plurality of temperature control modules. The slots may be arranged in the chamber. The test boards may be inserted into a part of the slots. The test boards may be configured to receive a plurality of semiconductor devices. The temperature control modules and the test boards may be alternately inserted into other parts of the slots. The temperature control modules may be configured to provide each of the test boards with air having a set temperature.
    Type: Application
    Filed: June 22, 2022
    Publication date: May 4, 2023
    Inventor: Nack Hyun KIM
  • Patent number: 11276445
    Abstract: A data storage device includes a nonvolatile memory device including dies including word line groups in which word lines are grouped; and a controller. The controller includes a word line health rating logic configured to determine a health rating of each word line and a health rating of each word line group based on state information on each of health rating factors associated with the word lines; a memory including a word line health rating table in which the health rating of each word line and the health rating of each word line group are stored; and a mapping logic configured to generate a management target logical super block by mapping one word line group having a lowest health rating and word line groups having a highest health rating, and generate a normal logical super block by mapping word line groups having intermediate health ratings.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: March 15, 2022
    Assignee: SK hynix Inc.
    Inventors: Nack Hyun Kim, Shin Hye Lee, Min Kyu Lee
  • Patent number: 10917111
    Abstract: An error correction code (ECC) unit includes an error correction code (ECC) encoder configured to perform error correction code (ECC) encoding for each of a first data group and a second data group sharing at least one data with the first data group; and an error correction code (ECC) decoder configured to perform error correction code (ECC) decoding for each of the first data group and the second data group. The ECC decoder performs the ECC decoding for the second data group when the ECC decoding for the first data group fails, and does not perform the ECC decoding for the second data group when the ECC decoding for the first data group succeeds.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: February 9, 2021
    Assignee: SK hynix Inc.
    Inventors: Nack Hyun Kim, Dong Wook Kim, Min Kyu Lee
  • Publication number: 20200342925
    Abstract: A data storage device includes a nonvolatile memory device including dies including word line groups in which word lines are grouped; and a controller. The controller includes a word line health rating logic configured to determine a health rating of each word line and a health rating of each word line group based on state information on each of health rating factors associated with the word lines; a memory including a word line health rating table in which the health rating of each word line and the health rating of each word line group are stored; and a mapping logic configured to generate a management target logical super block by mapping one word line group having a lowest health rating and word line groups having a highest health rating, and generate a normal logical super block by mapping word line groups having intermediate health ratings.
    Type: Application
    Filed: July 10, 2020
    Publication date: October 29, 2020
    Inventors: Nack Hyun KIM, Shin Hye LEE, Min Kyu LEE
  • Patent number: 10748588
    Abstract: A data storage device includes a nonvolatile memory device including dies including word line groups in which word lines are grouped; and a controller. The controller includes a word line health rating logic configured to determine a health rating of each word line and a health rating of each word line group based on state information on each of health rating factors associated with the word lines; a memory including a word line health rating table in which the health rating of each word line and the health rating of each word line group are stored; and a mapping logic configured to generate a management target logical super block by mapping one word line group having a lowest health rating and word line groups having a highest health rating, and generate a normal logical super block by mapping word line groups having intermediate health ratings.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: August 18, 2020
    Assignee: SK hynix Inc.
    Inventors: Nack Hyun Kim, Shin Hye Lee, Min Kyu Lee
  • Publication number: 20190356331
    Abstract: An error correction code (ECC) unit includes an error correction code (ECC) encoder configured to perform error correction code (ECC) encoding for each of a first data group and a second data group sharing at least one data with the first data group; and an error correction code (ECC) decoder configured to perform error correction code (ECC) decoding for each of the first data group and the second data group. The ECC decoder performs the ECC decoding for the second data group when the ECC decoding for the first data group fails, and does not perform the ECC decoding for the second data group when the ECC decoding for the first data group succeeds.
    Type: Application
    Filed: August 1, 2019
    Publication date: November 21, 2019
    Applicant: SK hynix Inc.
    Inventors: Nack Hyun KIM, Dong Wook KIM, Min Kyu LEE
  • Patent number: 10439642
    Abstract: An error correction code processing method includes performing a first encoding operation for a data group of a first direction; performing a second encoding operation for a data group of a second direction, wherein the data group of the first direction shares one or more data with the data group of the second direction; performing a first decoding operation of correcting an error included in the data group of the first direction; and performing a second decoding operation of correcting an error included in the data group of the second direction when the first decoding operation fails.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: October 8, 2019
    Assignee: SK hynix Inc.
    Inventors: Nack Hyun Kim, Dong Wook Kim, Min Kyu Lee
  • Publication number: 20190214065
    Abstract: A data storage device includes a nonvolatile memory device including dies including word line groups in which word lines are grouped; and a controller. The controller includes a word line health rating logic configured to determine a health rating of each word line and a health rating of each word line group based on state information on each of health rating factors associated with the word lines; a memory including a word line health rating table in which the health rating of each word line and the health rating of each word line group are stored; and a mapping logic configured to generate a management target logical super block by mapping one word line group having a lowest health rating and word line groups having a highest health rating, and generate a normal logical super block by mapping word line groups having intermediate health ratings.
    Type: Application
    Filed: August 23, 2018
    Publication date: July 11, 2019
    Inventors: Nack Hyun KIM, Shin Hye LEE, Min Kyu LEE
  • Publication number: 20180191373
    Abstract: An error correction code processing method includes performing a first encoding operation for a data group of a first direction; performing a second encoding operation for a data group of a second direction, wherein the data group of the first direction shares one or more data with the data group of the second direction; performing a first decoding operation of correcting an error included in the data group of the first direction; and performing a second decoding operation of correcting an error included in the data group of the second direction when the first decoding operation fails.
    Type: Application
    Filed: June 26, 2017
    Publication date: July 5, 2018
    Inventors: Nack Hyun KIM, Dong Wook KIM, Min Kyu LEE
  • Publication number: 20180129559
    Abstract: A semiconductor memory device includes a memory cell array, a read/write circuit, a control logic, and a block defect information storage unit. The control logic controls the read/write circuit to perform a read/write operation on the memory cell array. The block defect information storage unit stores information on access records of memory blocks of the memory cell array and whether defects occur in the memory blocks. When the performance of an operation is requested, the control logic controls the read/write circuit to determine whether the memory block is first accessed with reference to the access records of the block defect information storage unit and perform a word line test of the memory block, based on the determination.
    Type: Application
    Filed: August 25, 2017
    Publication date: May 10, 2018
    Inventors: Nack Hyun KIM, Min Kyu PARK, Min Kyu LEE
  • Publication number: 20170070240
    Abstract: A memory system includes a controller and a semiconductor memory device. The semiconductor memory device stores a data set having main data bits and parity bits and provide soft decision bit streams corresponding to the data set in response to control signals of the controller. The controller includes a soft decision decoder for identifying data set by decoding the soft decision bit streams according to a first decoding method, a deinterleaver for deinterleaving the identified data set, a hard decision decoder for decoding the deinterleaved data set according to a second decoding method based on parity bits included in the deinterleaved data set, and outputting a failed data set if the decoding according to the second decoding method has failed, and an interleaver for interleaving the failed data set. The interleaved data set is fed back to the soft decision decoder.
    Type: Application
    Filed: January 25, 2016
    Publication date: March 9, 2017
    Inventor: Nack Hyun KIM
  • Publication number: 20160153797
    Abstract: The present invention suggests an apparatus and a method for guiding a driving route of a vehicle which guide a driving route at a point of interest based on a photographic image which is obtained by accessing a server. The present invention provides an apparatus, including: a point-of-interest selecting unit which selects a point of interest on a driving route of a vehicle; a moving route image obtaining unit which, when the point of interest is selected, accesses a server to obtain a moving route image for the point of interest based on a photographic image; a point-of-interest approaching determining unit which determines whether the vehicle approaches the point of interest; and a route guiding control unit which, when the vehicle is determined to approach the point of interest, guides the driving route at the point of interest based on the moving route image for the point of interest.
    Type: Application
    Filed: January 9, 2015
    Publication date: June 2, 2016
    Inventor: Nack Hyun KIM