Abstract: A Schottky barrier diode includes: an n? type layer disposed on a first surface of an n+ type silicon carbide substrate; a p+ type region and a p type region disposed on the n? type layer and separated from each other; an anode disposed on the n? type layer, the p+ type region, and the p type region; and a cathode disposed on a second surface of the n+ type silicon carbide substrate. The p type region is in plural, has a hexagonal shape on the plane, and is arranged in a matrix shape, and the n? type layer disposed between the p+ type region and the p type region has a hexagonal shape on the plane and encloses the p type region.

Abstract: A semiconductor device includes: an n? type layer disposed on a first surface of a substrate; an n+ type region disposed on the n? type layer; a trench disposed on the n? type layer; a p type region disposed adjacent to a side surface of the trench and extending to a part under a lower surface of the trench; an auxiliary n+ type region disposed under the lower surface of the trench and disposed in the p type region; an auxiliary electrode disposed at the lower surface of the trench; a gate electrode separated from the auxiliary electrode and disposed on the lower surface of the trench; a source electrode disposed on the n+ type region; and a drain electrode disposed at a second surface of the substrate.

Abstract: A semiconductor device includes: an n? type layer disposed on a first surface of a substrate; an n+ type region disposed on the n? type layer; a trench disposed on the n? type layer; a p type region disposed adjacent to a side surface of the trench and extending to a part under a lower surface of the trench; an auxiliary n+ type region disposed under the lower surface of the trench and disposed in the p type region; an auxiliary electrode disposed at the lower surface of the trench; a gate electrode separated from the auxiliary electrode and disposed on the lower surface of the trench; a source electrode disposed on the n+ type region; and a drain electrode disposed at a second surface of the substrate.

Abstract: A Schottky barrier diode according to an exemplary embodiment of the present disclosure includes: an n? type layer disposed on a first surface of an n+ type silicon carbide substrate; a p+ type region and a p type region disposed on the n? type layer and separated from each other; an anode disposed on the n? type layer, the p+ type region, and the p type region; and a cathode disposed on a second surface of the n+ type silicon carbide substrate, wherein the p type region is in plural, has a hexagonal shape on the plane, and is arranged in a matrix shape, and the n? type layer disposed between the p+ type region and the p type region has a hexagonal shape on the plane and encloses the p type region.

Abstract: A semiconductor device includes a first n? type layer and a second n? type layer that are sequentially disposed on a first surface of an n+ type silicon carbide substrate; a first trench and a second trench that are disposed at the second n? type layer and are spaced apart from each other; a p type region surrounding a lateral surface and a lower surface of the first trench; an n+ type region disposed on the p type region and the second n? type layer; a gate insulating layer disposed in the second trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer and the n+ type region disposed in the first trench; and a drain electrode disposed at a second surface of the n+ type silicon carbide substrate.

Abstract: A semiconductor device includes a first n? type layer and a second n? type layer that are sequentially disposed on a first surface of an n+ type silicon carbide substrate; a first trench and a second trench that are disposed at the second n? type layer and are spaced apart from each other; a p type region surrounding a lateral surface and a lower surface of the first trench; an n+ type region disposed on the p type region and the second n? type layer; a gate insulating layer disposed in the second trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer and the n+ type region disposed in the first trench; and a drain electrode disposed at a second surface of the n+ type silicon carbide substrate.