Abstract: A bubbler chamber assembly comprising one chamber or two or more chambers connected in series, all chambers being in substantially vertical orientation. A solid or liquid source of the compound is contained in the chamber or chambers. The ratio between the length of the chamber or combined length of chambers connected in series with respect to the direction of flow of the carrier gas through the chamber or chambers and the average diameter equivalent of the cross section of the chamber or chambers with respect to the direction of flow of the carrier gas through the chamber or chambers is not less than about 6:1.

Abstract: A bubbler chamber assembly comprising one chamber or two or more chambers connected in series, all chambers being in substantially vertical orientation. A solid or liquid source of the compound is contained in the chamber or chambers. The ratio between the length of the chamber or combined length of chambers connected in series with respect to the direction of flow of the carrier gas through the chamber or chambers and the average diameter equivalent of the cross section of the chamber or chambers with respect to the direction of flow of the carrier gas through the chamber or chambers is not less than about 6:1.

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: A self oscillating mixer circuit includes a dual gate FET, an NDR device coupled to a first gate of the FET, and a first bias input circuit adapted to couple a first bias voltage across the NDR device. The first bias voltage controls operation of the NDR device within an NDR region of the V-I characteristic curve of the NDR device so that oscillations occur in the NDR device and the FET. The first bias input circuit is adjustable to adjust the applied first bias voltage so as to control frequency and amplitude of the oscillations. An RF input terminal and a second bias input circuit are coupled to supply a second bias voltage at the other gate terminal, which biases the FET at maximum gain so that RF signals applied to the RF input terminal are mixed with the oscillations.

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large GaAs wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer is spaced apart from a GaAs substrate by a decoupling layer. The decoupling layer dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer. The accommodating buffer layer is lattice matched to the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying GaAs substrate is taken care of by the decoupling layer.

Abstract: An improved and novel ingestible capsule and method for determining medical information from within the alimentary canal of a human or an animal utilizing the ingestible capsule including a non-digestible outer shell that is configured to pass through the alimentary canal. Housed within the non-digestible outer shell is a sensor membrane that is exposed through a portion of the non-digestible outer shell. The sensor membrane is characterized as detecting and identifying predetermined detectable information. Further housed within the non-digestible outer shell are an electronic device that alters its electronic properties in the presence of specific information obtained by the sensor membrane from within the alimentary canal, a bio-sensing circuit that turns on a power source and a low frequency transducer in response to the signal from the electronic device. The low frequency transducer sends a signal of the changed electronic properties to a receiver positioned outside the body.

Abstract: An integrated smart power circuit including a power semiconductor device fabricated on a conducting substrate with a source positioned adjacent the upper surface of the substrate, a control terminal between the upper and lower surfaces, and a drain positioned adjacent the lower surface of the substrate. A high resistance layer is formed on a portion of the upper surface of the substrate, either directly overlying or adjacent to the power device, and doped semiconductor material is positioned on the high resistance layer. Control circuitry is formed in the doped semiconductor material. The high resistance layer can be conveniently formed by growing a layer of AlAs and growing doped layers on the AlAs. The AlAs can be easily oxidized thereafter.

Abstract: An integrated smart power circuit including a power semiconductor device fabricated on a conducting substrate with a source positioned adjacent the upper surface of the substrate, a control terminal between the upper and lower surfaces, and a drain positioned adjacent the lower surface of the substrate. A high resistance layer is formed on a portion of the upper surface of the substrate, either directly overlying or adjacent to the power device, and doped semiconductor material is positioned on the high resistance layer. Control circuitry is formed in the doped semiconductor material. The high resistance layer can be conveniently formed by growing a layer of AlAs and growing doped layers on the AlAs. The AlAs can be easily oxidized thereafter.

Abstract: A heterostructure interband tunneling diode includes a contact layer comprising indium gallium arsenide of a first conductivity type, an injection layer comprising indium gallium arsenide of a second conductivity type, a first doped layer of the first conductivity type positioned adjacent to the contact layer, and a second doped layer of a second conductivity type juxtaposed between the first doped layer and the injection layer, wherein at least one of the first and second tunnel barrier layers comprises indium aluminium arsenide. A second embodiment includes a doped layer of the first conductivity type positioned adjacent to the contact layer, and a barrier layer positioned adjacent to the injection layer, and a quantum well layer comprising indium gallium arsenide juxtaposed between the doped layer and the barrier layer, wherein at least one of the doped and barrier layers comprises indium aluminium arsenide.

Abstract: A VCO includes a transistor having a plurality of negative differential resistance devices coupled in series to the source terminal of the transistor, with each of the devices having a negative differential resistance operating region. Biasing circuits are coupled to the drain and gate terminals along with operating voltages which set the oscillator to operating in a negative differential resistance region of at least one of the negative differential resistance devices so that oscillations of a selected frequency are produced at an output terminal. The transistor, the plurality of N devices, the DC biasing circuits, and the operating voltages are connected so that the oscillator negative differential resistance operating region is greater than N times as wide as each of the device negative differential operating regions individually.

Abstract: In a form of the disclosure an array of coupled cavities (called minicavities) of a QWH semiconductor laser are defined by a native oxide of an aluminum-bearing III-V semiconductor material and are arranged serially end-to-end along the longitudinal direction. The native oxide confines the injected carriers and optical field within the cavities, resulting in reflection and optical feedback distributed periodically along the laser stripe. Single-longitudinal-mode operation is exhibited over an extended range. In a further form of the disclosure, two linear arrays of end-coupled minicavities are arranged side by side to obtain a two dimensional array, with resultant lateral coupling between the linear arrays. The two dimensional array exhibits mode switching and multiple switching in the light power (L) versus current (I) characteristic (L-I) with increasing current. In another form of the disclosure, a stripe laser is transversely coupled (or side-coupled) with a linear array of end-coupled minicavities.

Abstract: In a form of the disclosure an array of coupled cavities (called minicavities) of a QWH semiconductor laser are defined by a native oxide of an aluminum-bearing III-V semiconductor material and are arranged serially end-to-end along the longitudinal direction. The native oxide confines the injected carriers and optical field within the cavities, resulting in reflection and optical feedback distributed periodically along the laser stripe. Single-longitudinal-mode operation is exhibited over an extended range. In a further form of the disclosure, two linear arrays of end-coupled minicavities are arranged side by side to obtain a two dimensional array, with resultant lateral coupling between the linear arrays. The two dimensional array exhibits mode switching and multiple switching in the light power (L) versus current (I) characteristic (L-I) with increasing current. In another form of the disclosure, a stripe laser is transversely coupled (or side-coupled) with a linear array of end-coupled minicavities.