Abstract: A photovoltaic device includes one or more features that taken alone or in combination enhance its efficiency. Some embodiments may comprise a tandem solar device in which a top PV cell is fabricated upon a front transparent substrate, that also serves as the top encapsulating substance. The top PV cell including the front encapsulating substance is then bonded (e.g., using adhesive) to a bottom PV cell in order to complete the tandem device. Using the same transparent, insulating element as both front encapsulating substance and a substrate for fabricating the top PV cell, obviates to the need to provide a separate structure (with resulting interfaces) to perform the latter role. For tandem and non-tandem PV devices, a Through-Substrate-Via (TSV) structure may extend through an insulating substrate in order to provide contact with an opposite side (e.g., back electrode). Embodiments may find particular use in fabricating shingled perovskite photovoltaic solar cells.

Abstract: A solar module architecture features a plurality of photovoltaic strips separated from a cell workpiece. The cell workpiece comprises alignment mark(s) located in cell quadrants close to the workpiece edge. According to specific embodiments, an alignment mark is positioned at a break in a bus bar. As a result of this location, in the assembled solar module containing the separated strip, the alignment mark is hidden from view by an overlapping module element. In particular embodiments, the overlapping module element is another separated PV strip in a shingled configuration.

Abstract: A bifacial photovoltaic module has components that are arranged to maximize the efficiency of a module for both front and back surfaces. An opaque portion is disposed on back surfaces of modules and aligned with horizontal support bars of a multiple-module system. Junction boxes are arranged at opposing ends of the opaque portion and couple adjacent modules in the system.

Abstract: A photovoltaic workpiece featuring micro-chamfers at its corners, bears a plurality of parallel thin conductive fingers extending between opposite edges. A first bus bar is formed overlapping the plurality of thin conductive fingers proximate to the first edge, with ends of the first bus bar not overlapping the micro-chamfers of the first edge. A second bus bar is formed overlapping the plurality of thin conductive fingers proximate to the second edge, with ends of the second bus bar not overlapping the micro-chamfers of the second edge. Additional front side bus bars are formed overlapping the plurality of thin conductive fingers at regular intervals in the interior of the workpiece. With bus bars thus patterned, the workpiece is singulated into: two edge strips featuring micro-chamfers and the respective first and second front side bus bars; and interior strip(s) that each include one of the respective additional front side bus bars.

Abstract: A bifacial photovoltaic module has components that are arranged to maximize the efficiency of a module for both front and back surfaces. An opaque portion is disposed on back surfaces of modules and aligned with horizontal support bars of a multiple-module system. Junction boxes are arranged at opposing ends of the opaque portion and couple adjacent modules in the system.

Abstract: A solar module has a plurality of strips that are configured with each other using high quality crystalline silicon increases power output even though total internal reflection in the module has been reduced or even eliminated. A module that is configured to eliminate reflective surfaces such as ribbon wire and exposed bus bars while making other surfaces such as a back sheet black or antireflective has no or minimal internal reflections while having higher efficiency and power yields per unit area than conventional modules that use white backsheets.

Abstract: A photovoltaic module with an improved interface includes a plurality of strings, each string comprising a plurality of PV strips coupled in series, each strip of the plurality of strips including first and second end strips disposed at opposing ends of the string and at least one middle strip disposed between the first and second end strips. Each strip has an aperture side, a back side, a single backside bus disposed on the back side of the strip, a plurality of conductive fingers disposed on the aperture side, a layer of electrically conductive adhesive that attaches the backside bus of every middle strip to the aperture side of an adjacent strip. The aperture sides of the plurality of strips are free from metallic materials between the plurality of conductive fingers, such that no bus bars are present on the aperture sides of the plurality of strips.

Abstract: A method for fabricating a semiconductor package having a 2-layer substrate, which includes an array of solder balls, is disclosed. The method includes patterning signal traces on a top layer of the substrate and identifying groups of signal traces to isolate. According to the present invention, a grounded isolation trace is then patterned adjacent to one of the groups of traces to isolate the signal traces, thereby providing noise shielding. In a preferred embodiment, the grounded isolation trace is provided with multiple vias, rather than only one. In a further aspect of the present invention a row of solder balls is connected together and to ground to create a bottom-layer isolating ground trace to further reduce noise. The bottom-layer isolating ground trace may be connected to the top-layer isolating ground trace using a via.

Abstract: A method for fabricating a semiconductor package having a 2-layer substrate, which includes an array of solder balls, is disclosed. The method includes patterning signal traces on a top layer of the substrate and identifying groups of signal traces to isolate. According to the present invention, a grounded isolation trace is then patterned adjacent to one of the groups of traces to isolate the signal traces, thereby providing noise shielding. In a preferred embodiment, the grounded isolation trace is provided with multiple vias, rather than only one. In a further aspect of the present invention a row of solder balls is connected together and to ground to create a bottom-layer isolating ground trace to further reduce noise. The bottom-layer isolating ground trace may be connected to the top-layer isolating ground trace using a via.

Abstract: A method for fabricating a semiconductor package having a 2-layer substrate, which includes an array of solder balls, is disclosed. The method includes patterning signal traces on a top layer of the substrate and identifying groups of signal traces to isolate. According to the present invention, a grounded isolation trace is then patterned adjacent to one of the groups of traces to isolate the signal traces, thereby providing noise shielding. In a preferred embodiment, the grounded isolation trace is provided with multiple vias, rather than only one. In a further aspect of the present invention a row of solder balls is connected together and to ground to create a bottom-layer isolating ground trace to further reduce noise. The bottom-layer isolating ground trace may be connected to the top-layer isolating ground trace using a via.