Patents by Inventor Nadeem T. Chaudhry

Nadeem T. Chaudhry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for handling parity errors in a data processing system
    Patent number: 7093190
    Abstract: A method and apparatus is provided for handling parity errors within a data processing system. Each occurrence of a parity error is attributed to an addressable memory location or a block of memory locations that was being accessed when the error occurred. A memory location or a memory block is marked as unusable after a predetermined number of errors is attributed to that location or block, respectively. The predetermined number of errors that is allowed to occur prior to degradation could be two, or more. In one embodiment, the predetermined number of errors resulting in memory degradation is programmable.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: August 15, 2006
    Assignee: Unisys Corporation
    Inventors: John S. Kuslak, Nadeem T. Chaudhry, Ashiqur Rahman