Patents by Inventor Nader HINDAWY

Nader HINDAWY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9059093
    Abstract: Methods for forming a variable fin FinFET cell wherein a plurality of fins is formed above a substrate, a portion of a fin is removed, forming a fin tip, a first area of a gate oxide layer is formed above the fin tip, and a second area of the gate oxide layer is formed above at least a remaining portion of the plurality of fins, wherein the first area is thicker than the second area.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: June 16, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Marc Tarabbia, Anurag Mittal, Nader Hindawy
  • Publication number: 20150137203
    Abstract: Methods for forming a variable fin FinFET cell that can withstand a larger voltage without gate oxide breakdown at a fin tip and the resulting devices are disclosed. A plurality of fins is formed above a substrate, a portion of a fin is removed, forming a fin tip, a first area of a gate oxide layer is formed above the fin tip, and a second area of the gate oxide layer is formed above at least a remaining portion of the plurality of fins, wherein the first area is thicker than the second area.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Marc TARABBIA, Anurag MITTAL, Nader HINDAWY
  • Patent number: 8987816
    Abstract: A method for forming CA power rails using a three mask decomposition process and the resulting device are provided. Embodiments include forming a horizontal diffusion CA power rail in an active layer of a semiconductor substrate using a first color mask; forming a plurality of vertical CAs in the active layer using second and third color masks, the vertical CAs connecting the CA power rail to at least one diffusion region on the semiconductor substrate, spaced from the CA power rail, wherein each pair of CAs formed by one of the second and third color masks are separated by at least two pitches.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: March 24, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Jason Stephens, Marc Tarabbia, Nader Hindawy, Roderick Augur
  • Publication number: 20150035052
    Abstract: A method for forming CA power rails using a three mask decomposition process and the resulting device are provided. Embodiments include forming a horizontal diffusion CA power rail in an active layer of a semiconductor substrate using a first color mask; forming a plurality of vertical CAs in the active layer using second and third color masks, the vertical CAs connecting the CA power rail to at least one diffusion region on the semiconductor substrate, spaced from the CA power rail, wherein each pair of CAs formed by one of the second and third color masks are separated by at least two pitches.
    Type: Application
    Filed: October 21, 2014
    Publication date: February 5, 2015
    Inventors: Jason STEPHENS, Marc TARABBIA, Nader HINDAWY, Roderick AUGUR