Abstract: An apparatus and method for providing a selectable novel reconnection algorithm for a repeater partition state machine to use in reconnecting a partitioned port. The reconnection algorithm permits selection of one of a first or a second partitioning/reconnection algorithm from a set of partitioning/reconnection algorithms. The first partitioning/reconnection algorithm corresponds to the IEEE 802.3 Standard partitioning/reconnection algorithm. The second partitioning/reconnection algorithm reconnects a partitioned port only upon minimum duration collision-free transmit activity from a partitioned port. The apparatus includes a partition state machine responsive to a counter controlled by a signal indicating the particular partitioning/reconnection algorithm selected and a device for selecting the algorithm. The signal determines whether the counter responds to receive and transmit activity or only to transmit activity.

Abstract: A discrete integrated repeater device and port MAU/AUI functions shares resources among its several ports. The device includes a single multi-bit free running counter providing preselected timing intervals to a plurality of latches. A signal undergoing measurement clears the latch while a preselected timing signal sets the latch. Receipt of a timing signal at a set latch indicates success or failure of some particular condition under test. The device satisfies an IEEE 802.3 specification for execution of a link integrity test. The device is also able to selectively disable or enable the link integrity test function for particular ports. A plurality of latches, one associated with each port, is set upon carrier sense detection at the particular port. A token passing mechanism implemented with a daisy chained line coupled to each latch enables a polling of each latch to provide carrier sense information about each port in a serial format.

Abstract: A discrete repeater having a predetermined number of ports includes an expansion port permitting connection of one or more of similar devices to produce a single repeater unit having an increased number of ports. The expansion port includes two bidirectional channels, an output channel and two input channels. An arbiter function connects to each discrete repeater to assert appropriate signals to permit the discrete repeaters making up a repeater unit to exchange data and collision information. This exchange of data is used in a state machine of the discrete repeaters to provide a repeater unit with distributed repeater and relay functions.

Abstract: A differential receiver incorporated into a MAU which receives both Manchester packets and linkpulses according to the IEEE 802.3 10Base-T standard has polarity detection and correction circuit for automatically detecting a reversed polarity for RD input lines. The differential receiver samples incoming pulses for time, amplitude and pulse width qualification and makes a preliminary polarity determination based upon polarity of such qualified pulses. This preliminary polarity allows a linktest state machine to transition to a link.sub.-- pass state, enabling output drivers of the MAU. Additionally, the linkpulse polarity information initially makes a polarity determination for the entire differential receiver which asserts a FIX POLARITY signal. The FIX POLARITY signal controls a correction circuit which internally remedies reversed input lines. Preferably, the correction circuit internally reroutes the signals.

Abstract: An integrated media attachment unit (MAU) operative for interfacing Digital Terminal Equipment (DTE) on a Local Area Network (LAN) using twisted pair media. The twisted pair function as either a DTE MAU or a repeater MAU. A line driver for the twisted pair differential signal provides a ramped response with low jitter while an improved Attachment Unit Interface (AUI) driver uses CMOS technology and provides simplified End-of-Transmission Delimiter (EDT) control. The twisted pair MAU includes a combined override and status indication of link status and an additional feature to allow automatic polarity reversal of differential signal input lines and polarity status signalling.