Abstract: Processing pads for mechanical and/or chemical-mechanical planarization or polishing of substrates in the fabrication of microelectronic devices, methods for making the pads, and methods, apparatus, and systems that utilize and incorporate the processing pads are provided. The processing pads include grooves or other openings in the abrading surface containing a solid or partially solid fill material that can be selectively removed as desired to maintain the fill at an about constant or set distance from the abrading surface of the pad and an about constant depth of the pad openings for multiple processing and conditioning applications over the life of the pad.

Abstract: Processing pads for mechanical and/or chemical-mechanical planarization or polishing of substrates in the fabrication of microelectronic devices, methods for making the pads, and methods, apparatus, and systems that utilize and incorporate the processing pads are provided. The processing pads include grooves or other openings in the abrading surface containing a solid or partially solid fill material that can be selectively removed as desired to maintain the fill at an about constant or set distance from the abrading surface of the pad and an about constant depth of the pad openings for multiple processing and conditioning applications over the life of the pad.

Abstract: Processing pads for mechanical and/or chemical-mechanical planarization or polishing of substrates in the fabrication of microelectronic devices, methods for making the pads, and methods, apparatus, and systems that utilize and incorporate the processing pads are provided. The processing pads include grooves or other openings in the abrading surface containing a solid or partially solid fill material that can be selectively removed as desired to maintain the fill at an about constant or set distance from the abrading surface of the pad and an about constant depth of the pad openings for multiple processing and conditioning applications over the life of the pad.

Abstract: A solar panel assembly may comprise a support member, a plurality of elongate solar cells, at least one motive member, and at least one actuator. Each elongate solar cell of the plurality may be pivotally coupled to the support member at a first location on each elongate solar cell, and each motive member may be pivotally coupled to each elongate solar cell of the plurality of elongate solar cells at a second location on each elongate solar cell, the second location offset a distance from the first location. Additionally, each actuator may be operably coupled to the at least one motive member. A method of operating a solar panel assembly may comprise rotating each of a plurality of elongate solar cells within the solar panel assembly relative to each other of the plurality of elongate solar cells within the solar panel assembly.

Abstract: Methods for orienting a plurality of sliver structures include applying at least one directional force to a group of sliver structures each having an orientation material applied to an edge to cause the plurality of sliver structures to orient in a common direction. The method may also include capturing the oriented sliver structures in a capture device to maintain the orientation of the sliver structures in the common direction. The oriented sliver structures may be used to form sub-assemblies such as solar array sub-assemblies that are used to generate solar power. Methods of applying an orientation material to sliver structures and resulting sliver structures are also disclosed.

Abstract: A method of assembling elongate solar cells into an assembly may comprise forming a unitary structure comprising a plurality of elongate solar cell precursor structures from a semiconductor wafer and attaching an adhesive surface of a transfer structure to an edge of each of the plurality of elongate solar cell precursor structures. The method may further comprise attaching the plurality of elongate solar cells to an expandable fixture and expanding the expandable fixture to change at least one of an orientation and a position of the plurality of elongate solar cells relative to one another. Additionally, a solar panel assembly may comprise a plurality of elongate solar cells positioned on a substrate, major surfaces of the plurality of elongate solar cells oriented in a non-planar configuration. Furthermore, elongate solar cells may comprise non-linear shapes in an as-formed state. Transfer structures and expandable fixtures useful in performing methods of the disclosure are also described.

Abstract: Processing pads for mechanical and/or chemical-mechanical planarization or polishing of substrates in the fabrication of microelectronic devices, methods for making the pads, and methods, apparatus, and systems that utilize and incorporate the processing pads are provided. The processing pads include grooves or other openings in the abrading surface containing a solid or partially solid fill material that can be selectively removed as desired to maintain the fill at an about constant or set distance from the abrading surface of the pad and an about constant depth of the pad openings for multiple processing and conditioning applications over the life of the pad.

Abstract: Methods for selectively oxidizing a semiconductor structure include generating a gas cluster ion beam comprising an oxidizing source gas, directing the gas cluster ion beam to a region of a substrate adjacent a conductive line and exposing the region to the gas cluster ion beam including an oxidizing matter. Utilizing the gas cluster ion beam enables selective oxidation of a targeted region at temperatures substantially lower than those of typical oxidation processes thus, reducing or eliminating oxidation of the conductive line. Semiconductor devices including transistors formed using such methods are also disclosed.

Abstract: Processing pads for mechanical and/or chemical-mechanical planarization or polishing of substrates in the fabrication of microelectronic devices, methods for making the pads, and methods, apparatus, and systems that utilize and incorporate the processing pads are provided. The processing pads include grooves or other openings in the abrading surface containing a solid or partially solid fill material that can be selectively removed as desired to maintain the fill at an about constant or set distance from the abrading surface of the pad and an about constant depth of the pad openings for multiple processing and conditioning applications over the life of the pad.

Abstract: An improved process forming a floating gate region of a semiconductor memory device. The process includes using a ceria slurry for chemical mechanical planarization to provide “stop on polysilicon” capabilities, allowing a thin nitride layer, or in the alternative no nitride layer, to be used and reducing the number of processing steps required to form the floating gate region.

Abstract: An improved process forming a floating gate region of a semiconductor memory device. The process includes using a ceria slurry for chemical mechanical planarization to provide “stop on polysilicon” capabilities, allowing a thin nitride layer, or in the alternative no nitride layer, to be used and reducing the number of processing steps required to form the floating gate region.

Abstract: Methods for selectively oxidizing a semiconductor structure include generating a gas cluster ion beam comprising an oxidizing source gas, directing the gas cluster ion beam to a region of a substrate adjacent a conductive line and exposing the region to the gas cluster ion beam including an oxidizing matter. Utilizing the gas cluster ion beam enables selective oxidation of a targeted region at temperatures substantially lower than those of typical oxidation processes thus, reducing or eliminating oxidation of the conductive line. Semiconductor devices including transistors formed using such methods are also disclosed.

Abstract: Methods for selectively oxidizing a semiconductor structure include generating a gas cluster ion beam comprising an oxidizing source gas, directing the gas cluster ion beam to a region of a substrate adjacent a conductive line and exposing the region to the gas cluster ion beam including an oxidizing matter. Utilizing the gas cluster ion beam enables selective oxidation of a targeted region at temperatures substantially lower than those of typical oxidation processes thus, reducing or eliminating oxidation of the conductive line. Semiconductor devices including transistors formed using such methods are also disclosed.

Abstract: Methods for selectively oxidizing a semiconductor structure include generating a gas cluster ion beam comprising an oxidizing source gas, directing the gas cluster ion beam to a region of a substrate adjacent a conductive line and exposing the region to the gas cluster ion beam including an oxidizing matter. Utilizing the gas cluster ion beam enables selective oxidation of a targeted region at temperatures substantially lower than those of typical oxidation processes thus, reducing or eliminating oxidation of the conductive line. Semiconductor devices including transistors formed using such methods are also disclosed.

Abstract: This invention includes a chemical mechanical polishing method including providing a substrate having an organic material to be polished by chemical mechanical polishing. In one implementation, the organic material is chemical mechanically polished using a polishing pad downforce on the substrate of less than or equal to 1.75 psi, using an aqueous slurry comprising abrasive particles comprising an individual particle size of less than or equal to 100 nanometers and at a particle concentration of less than or equal to 20% by weight, and at least one of an acid or a surfactant effective to achieve a removal rate of the organic material of at least 500 Angstroms per minute. Other aspects and implementations are contemplated.

Abstract: This invention includes a chemical mechanical polishing method including providing a substrate having an organic material to be polished by chemical mechanical polishing. In one implementation, the organic material is chemical mechanically polished using a polishing pad downforce on the substrate of less than or equal to 1.75 psi, using an aqueous slurry comprising abrasive particles comprising an individual particle size of less than or equal to 100 nanometers and at a particle concentration of less than or equal to 20% by weight, and at least one of an acid or a surfactant effective to achieve a removal rate of the organic material of at least 500 Angstroms per minute. Other aspects and implementations are contemplated.

Abstract: An improved process forming a floating gate region of a semiconductor memory device. The process includes using a ceria slurry for chemical mechanical planarization to provide “stop on polysilicon” capabilities, allowing a thin nitride layer, or in the alternative no nitride layer, to be used and reducing the number of processing steps required to form the floating gate region.

Abstract: Processing pads for mechanical and/or chemical-mechanical planarization or polishing of substrates in the fabrication of microelectronic devices, methods for making the pads, and methods, apparatus, and systems that utilize and incorporate the processing pads are provided. The processing pads include grooves or other openings in the abrading surface containing a solid or partially solid fill material that can be selectively removed as desired to maintain the fill at an about constant or set distance from the abrading surface of the pad and an about constant depth of the pad openings for multiple processing and conditioning applications over the life of the pad.