Patents by Inventor Naga Gorti

Naga Gorti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10956164
    Abstract: A computer system includes a processor configured to generate a prediction by a branch predictor that a branch instruction will be taken or not taken by consulting a current state of a state machine, the state machine having at least one taken state and at least one not taken state. The processor is also configured to return the prediction to a processing unit and detect a result that the branch instruction was actually taken or actually not taken. The processor is further configured to, based on the prediction being different than the result or based on the prediction being weak and consistent with the result, consult a probability value being a static value and/or a value based on a history of outcomes of previous branch instructions, and based on the probability value having a selected value or being within a selected range, update the state machine.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: March 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Naga Gorti, Edmund Joseph Gieske
  • Patent number: 10936318
    Abstract: A computer system includes a first predictor circuit configured to generate a first predictor signal, and a second predictor circuit configured to generate a second predictor signal different from the first predictor signal. The computer system further includes a TIP arbiter configured to receive the first predictor signal and the second predictor signal, and to select one of the first predictor signal or the second predictor signal as a final prediction of a target address for a fetched branch instruction. The selection is based at least in part on a comparison between a branch address of the fetched branch instruction and a stored tag value, along with a counter value stored in the arbiter entry.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: March 2, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ehsan Fatehi, Naga Gorti, Nicholas Orzol, Christian Zoellin
  • Publication number: 20200167165
    Abstract: A computer system includes a processor configured to generate a prediction by a branch predictor that a branch instruction will be taken or not taken by consulting a current state of a state machine, the state machine having at least one taken state and at least one not taken state. The processor is also configured to return the prediction to a processing unit and detect a result that the branch instruction was actually taken or actually not taken. The processor is further configured to, based on the prediction being different than the result or based on the prediction being weak and consistent with the result, consult a probability value being a static value and/or a value based on a history of outcomes of previous branch instructions, and based on the probability value having a selected value or being within a selected range, update the state machine.
    Type: Application
    Filed: November 27, 2018
    Publication date: May 28, 2020
    Inventors: Naga Gorti, Edmund Joseph Gieske
  • Publication number: 20200159538
    Abstract: A processor comprising a processor pipeline comprising one or more execution units configured to execute branch instructions, a branch predictor associated with the processor pipeline and configured to predict a branch instruction prediction outcome, and the branch prediction unit. The branch predictor is turned off to save power and avoid miss-predictions when the branch predictor and/or branch prediction unit accuracy is lower than expected.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 21, 2020
    Inventors: Naga Gorti, David Levitan
  • Publication number: 20200150968
    Abstract: A computer system includes a first predictor circuit configured to generate a first predictor signal, and a second predictor circuit configured to generate a second predictor signal different from the first predictor signal. The computer system further includes a TIP arbiter configured to receive the first predictor signal and the second predictor signal, and to select one of the first predictor signal or the second predictor signal as a final prediction of a target address for a fetched branch instruction. The selection is based at least in part on a comparison between a branch address of the fetched branch instruction and a stored tag value, along with a counter value stored in the arbiter entry.
    Type: Application
    Filed: November 14, 2018
    Publication date: May 14, 2020
    Inventors: Ehsan Fatehi, Naga Gorti, Nicholas Orzol, Christian Zoellin