Patents by Inventor Naga Kiranmayee UPADHYAYULA

Naga Kiranmayee UPADHYAYULA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Independent NAND memory operations by plane
    Patent number: 10877696
    Abstract: Independent multi-plane commands for non-volatile memory devices are described. In one example, a three-dimensional (3D) NAND memory device includes 3D NAND dies, each die including multiple planes of memory cells. The device includes input/output (I/O) circuitry to receive multiple commands from a host, each of the received commands to access one of the planes. The device includes logic (which can be implemented with, for example, an ASIC controller, firmware, or both) to queue the commands in separate queues for each of the planes based on a target plane of each of the commands. The logic issues the commands to their target planes independent of other planes' status, and tracks completion status of the commands independently for each plane.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: December 29, 2020
    Assignee: Intel Corporation
    Inventors: Yogesh B. Wakchaure, Aliasgar S. Madraswala, David J. Pelster, Donia Sebastian, Curtis Gittens, Xin Guo, Neelesh Vemula, Varsha Regulapati, Naga Kiranmayee Upadhyayula
  • Techniques for providing signal calibration data
    Patent number: 10622083
    Abstract: In connection with data pin timing calibration with a strobe signal, examples provide for determination of pass/fail status of a pin from multiple pass/fail results in a single operation. Determination of pass/fail results for multiple pins based on multiple applied trim offsets can be made in parallel. Accordingly, a time to determine pass/fail results from multiple trim values for a pin can be reduced, which can enable faster power-up of NAND flash devices.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: April 14, 2020
    Assignee: Intel Corporation
    Inventors: Varsha Regulapati, Heonwook Kim, Aliasgar S. Madraswala, Naga Kiranmayee Upadhyayula, Purval S. Sule, Jong Tai Park, Sriram Balasubrahmanyam, Manjiri M. Katmore
  • TECHNIQUES FOR PROVIDING SIGNAL CALIBRATION DATA
    Publication number: 20190252033
    Abstract: In connection with data pin timing calibration with a strobe signal, examples provide for determination of pass/fail status of a pin from multiple pass/fail results in a single operation. Determination of pass/fail results for multiple pins based on multiple applied trim offsets can be made in parallel. Accordingly, a time to determine pass/fail results from multiple trim values for a pin can be reduced, which can enable faster power-up of NAND flash devices.
    Type: Application
    Filed: October 23, 2018
    Publication date: August 15, 2019
    Inventors: Varsha REGULAPATI, Heonwook KIM, Aliasgar S. MADRASWALA, Naga Kiranmayee UPADHYAYULA, Purval S. SULE, Jong Tai PARK, Sriram BALASUBRAHMANYAM, Manjiri M. KATMORE
  • INDEPENDENT NAND MEMORY OPERATIONS BY PLANE
    Publication number: 20190227749
    Abstract: Independent multi-plane commands for non-volatile memory devices are described. In one example, a three-dimensional (3D) NAND memory device includes 3D NAND dies, each die including multiple planes of memory cells. The device includes input/output (I/O) circuitry to receive multiple commands from a host, each of the received commands to access one of the planes. The device includes logic (which can be implemented with, for example, an ASIC controller, firmware, or both) to queue the commands in separate queues for each of the planes based on a target plane of each of the commands. The logic issues the commands to their target planes independent of other planes' status, and tracks completion status of the commands independently for each plane.
    Type: Application
    Filed: March 28, 2019
    Publication date: July 25, 2019
    Inventors: Yogesh B. WAKCHAURE, Aliasgar S. MADRASWALA, David J. PELSTER, Donia SEBASTIAN, Curtis GITTENS, Xin GUO, Neelesh VEMULA, Varsha REGULAPATI, Naga Kiranmayee UPADHYAYULA