Patents by Inventor Nagarajan JAYARAJU

Nagarajan JAYARAJU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD OF FILLING THROUGH-HOLES TO REDUCE VOIDS
    Publication number: 20230279577
    Abstract: Through-holes of a substrate are initially plated with copper to form an incomplete bridge in the middle of the through-holes by a phase shift pulse plating process on both sides of the substrate simultaneously. This is followed by pulse plating the entire substrate to complete the filling of the through-holes.
    Type: Application
    Filed: February 1, 2023
    Publication date: September 7, 2023
    Inventors: Nagarajan Jayaraju, Derek J. Thoresen, Joanna J. Dziewiszek, Jimmy John, Zuhra I. Niazimbetova
  • Method of filling through-holes to reduce voids and other defects
    Patent number: 10508357
    Abstract: Direct current plating methods inhibit void formation, reduce dimples and eliminate nodules. The method involves electroplating copper at a high current density followed by a pause in electroplating and then turning on the current to electroplate at a lower current density to fill through-holes.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: December 17, 2019
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Nagarajan Jayaraju, Leon Barstad, Zuhra Niazimbetova, Joanna Dziewiszek
  • Method of filling through-holes to reduce voids and other defects
    Patent number: 10512174
    Abstract: Direct current plating methods inhibit void formation, reduce dimples and eliminate nodules. The method involves electroplating copper at a high current density followed by electroplating at a lower current density to fill through-holes.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: December 17, 2019
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Nagarajan Jayaraju, Leon Barstad
  • Filling through-holes
    Patent number: 10154598
    Abstract: Pulse plating methods which include a forward pulse but no reverse pulse inhibit or reduce dimpling and voids during copper electroplating of through-holes in substrates such as printed circuit boards. The pulse plating methods may be used to fill through-holes with copper where the through-holes are coated with electroless copper or flash copper.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: December 11, 2018
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Nagarajan Jayaraju, Leon R. Barstad, Elie H. Najjar
  • METHOD OF FILLING THROUGH-HOLES TO REDUCE VOIDS AND OTHER DEFECTS
    Publication number: 20170238427
    Abstract: Direct current plating methods inhibit void formation, reduce dimples and eliminate nodules. The method involves electroplating copper at a high current density followed by electroplating at a lower current density to fill through-holes.
    Type: Application
    Filed: December 20, 2016
    Publication date: August 17, 2017
    Inventors: Nagarajan Jayaraju, Leon Barstad
  • METHOD OF FILLING THROUGH-HOLES TO REDUCE VOIDS AND OTHER DEFECTS
    Publication number: 20170233886
    Abstract: Direct current plating methods inhibit void formation, reduce dimples and eliminate nodules. The method involves electroplating copper at a high current density followed by a pause in electroplating and then turning on the current to electroplate at a lower current density to fill through-holes.
    Type: Application
    Filed: December 20, 2016
    Publication date: August 17, 2017
    Inventors: Nagarajan Jayaraju, Leon Barstad, Zuhra Niazimbetova, Joanna Dziewiszek
  • Method of filling through-holes
    Patent number: 9598787
    Abstract: The methods inhibit or reduce dimpling and voids during copper electroplating of through-holes with flash copper layers in substrates such as printed circuit boards. An acid solution containing reaction products of aromatic heterocyclic nitrogen compounds and epoxy-containing compounds is applied to the through-holes of the substrate followed by filling the through-holes with copper using a copper electroplating bath which includes additives such as brighteners and levelers.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 21, 2017
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Nagarajan Jayaraju, Elie H. Najjar, Leon R. Barstad
  • FILLING THROUGH-HOLES
    Publication number: 20160105975
    Abstract: Pulse plating methods which include a forward pulse but no reverse pulse inhibit or reduce dimpling and voids during copper electroplating of through-holes in substrates such as printed circuit boards. The pulse plating methods may be used to fill through-holes with copper where the through-holes are coated with electroless copper or flash copper.
    Type: Application
    Filed: October 1, 2015
    Publication date: April 14, 2016
    Inventors: Nagarajan Jayaraju, Leon R. Barstad, Elie H. Najjar
  • METHOD OF FILLING THROUGH-HOLES
    Publication number: 20140262801
    Abstract: The methods inhibit or reduce dimpling and voids during copper electroplating of through-holes with flash copper layers in substrates such as printed circuit boards. An acid solution containing disulfide compounds is applied to the through-holes of the substrate followed by filling the through-holes with copper using an acid copper electroplating bath which includes additives such as brighteners and levelers.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventors: Nagarajan JAYARAJU, Elie H. NAJJAR, Leon R. BARSTAD