Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations, including: determining a read voltage offset corresponding to a value of a metric reflective of a programmed state of a set of memory cells of the memory device; and performing, using the read voltage offset, a memory access operation with respect to the set of memory cells.

Abstract: A difference between a recorded time stamp for a first set of memory cells comprised by an open translation unit (TU) of memory cells and a current time stamp for the open TU is determined, wherein the first set of memory cells comprises a most recently programmed set of memory cells. It is determined, based on a current temperature for the open TU and the difference between the recorded time stamp and the current time stamp, that a second set of memory cells comprised by the open TU is in a coarse programming state. A programming operation is performed on the second set of memory cells using a reduced programming state verify level and a reduced programming state gate step size associated with the second set of memory cells.

Abstract: A memory device includes a memory array having a plurality of wordlines coupled with respective memory cells of the memory array. Control logic is operatively coupled with the memory array, the control logic to perform operations including: determining, prior to performing a read operation at one or more strings of the respective memory cells, a number of wordlines that are associated with memory cells that have been programmed; adjusting, based on the number of wordlines, a read level voltage for a selected wordline of the one or more strings that is to be read during the read operation; and causing, during the read operation, the adjusted read level voltage to be applied to the selected wordline.

Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving a request to perform a read operation on a segment of the memory device; determining whether a temperature offset value of the segment satisfies a threshold criterion associated with a program erase cycle count of the segment; and responsive to determining that the temperature offset value satisfies the threshold criterion, performing a corrective read operation on the segment of the memory device, wherein a sense time parameter of the corrective read operation is modified according to the temperature offset value and the program erase cycle count.

Abstract: Apparatuses and methods for programming partially programmed blocks with padding are provided. One example apparatus can include a controller configured to program a first number of word lines in a block of word lines in the array of memory cells, wherein the first number of word lines is less that a total number of word lines in the block, and program a second number of word lines of the array of memory cells, wherein the second number of word lines are programmed with padding and wherein the second number of word lines are different word lines that the first number of word lines and the total number of word lines in the block includes the first and second number of word lines.

Abstract: A system can include a memory device containing blocks made up of wordlines respectively connected to sets of memory cells, and a processing device, operatively coupled with the memory device to perform operations including responsive to receiving a read request that specifies a block, determining a value of a metric reflective of a number of programmed wordlines of the block. The operations can also include responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric, and performing, using the read voltage offset, a read operation responsive to the read request.

Abstract: A difference between a recorded time stamp for a first set of memory cells comprised by an open translation unit (TU) of memory cells and a current time stamp for the open TU is determined, wherein the first set of memory cells comprises a most recently programmed set of memory cells. It is determined, based on a current temperature for the open TU and the difference between the recorded time stamp and the current time stamp, that a second set of memory cells comprised by the open TU is in a coarse programming state. A programming operation is performed on the second set of memory cells using a reduced programming state verify level and a reduced programming state gate step size associated with the second set of memory cells.

Abstract: Methods and systems are provided for predicting reward liability data of reward programs. A method includes accessing, by a server system, historical reward related data associated with one or more reward programs administered by a reward program provider of reward program providers. The historical reward related data includes past redeemed reward points for each reward program aggregated on a particular time basis. Method includes identifying first seasonality patterns and second seasonality patterns associated with the historical reward related data. Method includes training a reward liability prediction model based on first and second seasonality patterns, wherein the trained time-series prediction model is configured to predict future reward liability data associated with the one or more reward programs.

Abstract: The disclosure relates to AI-based machine-learning and natural language modeling to identify semantic similarities between sets of content having natural language text. For example, a system may generate a relevance classification that indicates whether content such as articles are non-specifically relevant to charities without identifying a particular charity. If the content is non-specifically relevant to charities, the system may apply a natural language model to generate sentence embeddings based on the content and determine a level similarity between the sentence embeddings and a query embedding generated from a charity query. The charity query may itself be generated from a full description of the charity through an encoder-decoder architecture with reinforcement learning.

Abstract: A classifier is trained to classify business supplier relationships using synthetic training data samples. Real training data samples are collected and transformed into sample encodings using an encoder. The real training data samples include feature data associated with health class indicators indicative of relationships between suppliers and service providers. A set of synthetic training data samples is generated from the sample encodings using a generator and discrimination feedback data is generated using a discriminator based on the real training data samples and the synthetic training data samples. The discrimination feedback data is used to train the generator. A classifier model is trained to classify suppliers with health class indicators using the set of synthetic training data samples. The use of the encoder, generator, and discriminator enables the generation of accurate synthetic training data that represents the source distribution of real data which are often partially observed.

Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving a request to perform a read operation on a segment of the memory device; determining whether a temperature offset value of the segment satisfies a threshold criterion associated with a program erase cycle count of the segment; and responsive to determining that the temperature offset value satisfies the threshold criterion, performing a corrective read operation on the segment of the memory device, wherein a sense time parameter of the corrective read operation is modified according to the temperature offset value and the program erase cycle count.

Abstract: Aspects of the disclosure provide a computerized method and system that utilizes reference expense reports to build and train one or more neural network learning models that intelligently determine the riskiness of to-be-determined expense reports submitted for reimbursement. In examples, a determined riskiness may inform a reimbursement entity manager when determining whether to approve, reject, and/or flag for further review a to-be-determined expense report. In instances, computerized expense report resolution systems and methods may be further automated in order to omit user interactions with to-be-determined expense reports, such that an intelligent computer determines whether to approve, reject, and/or flag a to-be-determined expense report based on the intelligently determined riskiness of the to-be-determined expense report.

Abstract: A difference between a recorded time stamp for a first set of memory cells comprised by an open translation unit (TU) of memory cells and a current time stamp for the open TU is determined, wherein the first set of memory cells comprises a most recently programmed set of memory cells. It is determined, based on a current temperature for the open TU and the difference between the recorded time stamp and the current time stamp, that a second set of memory cells comprised by the open TU is in a coarse programming state. A programming operation is performed on the second set of memory cells using a reduced programming state verify level and a reduced programming state gate step size associated with the second set of memory cells.

Abstract: A method for optimizing invoice payments according to supplier and buyer controls includes: receiving one or more received data message including invoice data, a buyer identification value, a supplier identification value, and a plurality of buyer optimization priorities, wherein the invoice data is associated with an invoice and includes an invoice amount and due date; identifying a plurality of supplier controls associated with the supplier identification value; identifying one or more buyer preferences associated with the buyer identification value; determining an optimal payment schedule for one or more payment transactions for the invoice based on the invoice data, the buyer optimization priorities, the plurality of supplier controls, and the one or more buyer preferences; transmitting a transmitted data message including the determined optimal payment schedule.

Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving a request to perform a read operation on a segment of the memory device; determining a program erase cycle count associated with the segment of the memory device; determining a temperature offset value for the segment of the memory device based on a write temperature and a read temperature, determining whether the temperature offset value satisfies a threshold criterion associated with the program erase cycle count of the segment; and responsive to determining that the temperature offset value satisfies the threshold criterion, performing a corrective read operation on the segment of the memory device, wherein a sense time parameter of the corrective read operation is modified according to the temperature offset value and the program erase cycle count.

Abstract: A system and method are disclosed for quality assurance and performance testing of supply chain applications and systems. Embodiments include providing a user interface for receiving a test case file that describes one or more actions to be tested and a properties file that maps one or more elements to one or more values, translating a received test case file and a corresponding properties file into a test case, and executing the test case by identifying the one or more actions identified in the test case and automatically invoking one or more testing components configured to execute a test using the one or more actions, wherein at least one of the one or more testing components is configured execute performance testing, and at least one of the one or more testing components is configured to execute regression testing.

Abstract: Systems and computer-implemented methods are described for modeling card inactivity. For example, hierarchical modeling may be used in which a first level classifier may be trained and validated to predict whether a card will be inactive. For cards predicted to become inactive by the first level classifier, a second level classifier may be trained and validated to predict when the card will become inactive. The first level classifier may include a binary classifier that generates two probabilities that respectively predict that the card will and will not become inactive. The second level classifier may include a multi-class classifier that generates a first probability that the card will become inactive at a first time period (such as one or more months in the future) and a second probability that the card will become inactive at a second time period. The multi-class classifier may generate other probabilities corresponding to other time periods.

Abstract: A system can include a memory device containing blocks made up of wordlines respectively connected to sets of memory cells, and a processing device, operatively coupled with the memory device to perform operations including responsive to receiving a read request that specifies a block, determining a value of a metric reflective of a number of programmed wordlines of the block. The operations can also include responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric, and performing, using the read voltage offset, a read operation responsive to the read request.

Abstract: A programming operation is performed on a first set of memory cells addressable by a first wordline (WL), wherein the first set of memory cells are comprised by an open translation unit (TU) of memory cells. It is determined that a second set of memory cells comprised by the open TU are in a coarse programming state, wherein the second set of memory cells is addressable by a second WL. In response to determining that the second set of memory cells satisfies a threshold criterion, a programming state verify level associated with the second WL is reduced by a verify level offset. A programming state gate step size associated with each WL of the open TU is reduced by a predefined value. A programming operation is performed on the second set of memory cells using the reduced programming state verify level and the reduced programming state gate step size.

Abstract: Control logic in a memory device receives a request to perform a read operation to read data from a memory array of a memory device, the request comprising an indication of a segment of the memory array where the data is stored, initiates a failed byte count read operation on the segment of the memory array to determine a failed byte count, and reads metadata stored in a flag byte corresponding to the segment of the memory array concurrently with the failed byte count read operation. The control logic further configures one or more parameters associated with the read operation based on the failed byte count and at least a portion of the metadata read from the flag byte.