Patents by Inventor Nagraj Shankar
Nagraj Shankar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9899234Abstract: Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.Type: GrantFiled: June 30, 2014Date of Patent: February 20, 2018Assignee: Lam Research CorporationInventors: Hui-Jung Wu, Thomas Joseph Knisley, Nagraj Shankar, Meihua Shen, John Hoang, Prithu Sharma
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Patent number: 9859153Abstract: Aluminum oxide films characterized by a dielectric constant (k) of less than about 7 (such as between about 4-6) and having a density of at least about 2.5 g/cm3 (such as about 3.0-3.2 g/cm3) are deposited on partially fabricated semiconductor devices over both metal and dielectric to serve as etch stop layers. The films are deposited using a deposition method that does not lead to oxidative damage of the metal. The deposition involves reacting an aluminum-containing precursor (e.g., a trialkylaluminum) with an alcohol and/or aluminum alkoxide. In one implementation the method involves flowing trimethylaluminum to the process chamber housing a substrate having an exposed metal and dielectric layers; purging and/or evacuating the process chamber; flowing t-butanol to the process chamber and allowing it to react with trimethylaluminum to form an aluminum oxide film and repeating the process steps until the film of desired thickness is formed.Type: GrantFiled: November 14, 2016Date of Patent: January 2, 2018Assignee: Lam Research CorporationInventors: Meliha Gozde Rainville, Nagraj Shankar, Kapu Sirish Reddy, Dennis M. Hausmann
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Publication number: 20170309514Abstract: Thin AlN films are oxidatively treated in a plasma to form AlO and AlON films without causing damage to underlying layers of a partially fabricated semiconductor device (e.g., to underlying metal and/or dielectric layers). The resulting AlO and AlON films are characterized by improved leakage current compared to the AlN film and are suitable for use as etch stop layers. The oxidative treatment involves contacting the substrate having an exposed AlN layer with a plasma formed in a process gas comprising an oxygen-containing gas and a hydrogen-containing gas. In some implementations oxidative treatment is performed with a plasma formed in a process gas including CO2 as an oxygen-containing gas, H2 as a hydrogen-containing gas, and further including a diluent gas. The use of a hydrogen-containing gas in the plasma eliminates the oxidative damage to the underlying layers.Type: ApplicationFiled: June 28, 2016Publication date: October 26, 2017Inventors: Meliha Gozde Rainville, Nagraj Shankar, Daniel Damjanovic, Kapu Sirish Reddy
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Patent number: 9633896Abstract: Dielectric AlO, AlOC, AlON and AlOCN films characterized by a dielectric constant (k) of less than about 10 and having a density of at least about 2.5 g/cm3 are deposited on partially fabricated semiconductor devices to serve as etch stop layers and/or diffusion barriers. In one implementation, a substrate containing an exposed dielectric layer (e.g., a ULK dielectric) and an exposed metal layer is contacted with an aluminum-containing compound (such as trimethylaluminum) in an iALD process chamber and the aluminum-containing compound is allowed to adsorb onto the surface of the substrate. This step is performed in an absence of plasma. Next, the unadsorbed aluminum-containing compound is removed from the process chamber, and the substrate is treated with a process gas containing CO2 or N2O, and an inert gas in a plasma to form an AlO, AlOC, or AlON layer. These steps are then repeated.Type: GrantFiled: November 23, 2015Date of Patent: April 25, 2017Assignee: Lam Research CorporationInventors: Daniel Damjanovic, Pramod Subramonium, Nagraj Shankar
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Publication number: 20170103914Abstract: Dielectric AlO, AlOC, AlON and AlOCN films characterized by a dielectric constant (k) of less than about 10 and having a density of at least about 2.5 g/cm3 are deposited on partially fabricated semiconductor devices to serve as etch stop layers and/or diffusion barriers. In one implementation, a substrate containing an exposed dielectric layer (e.g., a ULK dielectric) and an exposed metal layer is contacted with an aluminum-containing compound (such as trimethylaluminum) in an iALD process chamber and the aluminum-containing compound is allowed to adsorb onto the surface of the substrate. This step is performed in an absence of plasma. Next, the unadsorbed aluminum-containing compound is removed from the process chamber, and the substrate is treated with a process gas containing CO2 or N2O, and an inert gas in a plasma to form an AlO, AlOC, or AlON layer. These steps are then repeated.Type: ApplicationFiled: November 23, 2015Publication date: April 13, 2017Inventors: Daniel Damjanovic, Pramod Subramonium, Nagraj Shankar
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Patent number: 9418889Abstract: A dielectric diffusion barrier is deposited on a substrate that has a via and an overlying trench etched into an exposed layer of inter-layer dielectric, wherein there is exposed metal from the underlying interconnect at the bottom of the via. In order to provide a conductive path from the underlying metallization layer to the metallization layer that is being formed over it, the dielectric diffusion barrier is formed selectively on the inter-layer dielectric and not on the exposed metal at the bottom of the via. In one example a dielectric SiNC diffusion barrier layer is selectively deposited on the inter-layer dielectric using a remote plasma deposition and a precursor that contains both silicon and nitrogen atoms. Generally, a variety of dielectric diffusion barrier materials with dielectric constants of between about 3.0-20.0 can be selectively formed on inter-layer dielectric.Type: GrantFiled: June 17, 2015Date of Patent: August 16, 2016Assignee: Lam Research CorporationInventors: Thomas Weller Mountsier, Hui-Jung Wu, Bhadri N. Varadarajan, Nagraj Shankar, William T. Lee
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Patent number: 9399228Abstract: A substrate processing system includes a showerhead that comprises a head portion and a stem portion and that delivers precursor gas to a processing chamber. A baffle includes a base portion having an outer diameter that is greater than an outer diameter of the head portion of the showerhead, that comprises a dielectric material and that is arranged between the head portion of the showerhead and an upper surface of the processing chamber.Type: GrantFiled: February 6, 2013Date of Patent: July 26, 2016Assignee: NOVELLUS SYSTEMS, INC.Inventors: Patrick Breiling, Kevin Gerber, Jennifer O'Loughlin, Nagraj Shankar, Pramod Subramonium
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Patent number: 9379210Abstract: Various embodiments herein relate to formation of contact etch stop layers in the context of forming gates and contacts. In certain embodiments, a novel process flow is used, which may involve the deposition and removal of a sacrificial pre-metal dielectric material before a particular contact etch stop layer is formed. An auxiliary contact etch stop layer may be used in addition to a primary etch stop layer that is deposited previously. In certain cases the contact etch stop layer is a metal-containing material such as a nitride or an oxide. The contact etch stop layer may be deposited through a cyclic vapor deposition in some embodiments. The process flows disclosed herein provide improved protection against over-etching gate stacks, thereby minimizing gate-to-contact leakage. Further, the disclosed process flows result in wider flexibility in terms of materials and deposition conditions used for forming various dielectric materials, thereby minimizing parasitic capacitance.Type: GrantFiled: October 14, 2015Date of Patent: June 28, 2016Assignee: Lam Research CorporationInventors: Thomas Weller Mountsier, Bart J. van Schravendijk, Ananda K. Banerji, Nagraj Shankar
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Publication number: 20160071953Abstract: Various embodiments herein relate to formation of contact etch stop layers in the context of forming gates and contacts. In certain embodiments, a novel process flow is used, which may involve the deposition and removal of a sacrificial pre-metal dielectric material before a particular contact etch stop layer is formed. An auxiliary contact etch stop layer may be used in addition to a primary etch stop layer that is deposited previously. In certain cases the contact etch stop layer is a metal-containing material such as a nitride or an oxide. The contact etch stop layer may be deposited through a cyclic vapor deposition in some embodiments. The process flows disclosed herein provide improved protection against over-etching gate stacks, thereby minimizing gate-to-contact leakage. Further, the disclosed process flows result in wider flexibility in terms of materials and deposition conditions used for forming various dielectric materials, thereby minimizing parasitic capacitance.Type: ApplicationFiled: October 14, 2015Publication date: March 10, 2016Inventors: Thomas Weller Mountsier, Bart J. van Schravendijk, Ananda K. Banerji, Nagraj Shankar
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Publication number: 20160064211Abstract: Methods of depositing conformal aluminum nitride films on semiconductor substrates are provided. Disclosed methods involve (a) exposing a substrate to an aluminum-containing precursor, (b) purging the aluminum-containing precursor for a duration insufficient to remove substantially all of the aluminum-containing precursor in gas phase, (c) exposing the substrate to a nitrogen-containing precursor to form aluminum nitride, (d) purging the nitrogen-containing precursor, and (e) repeating (a) through (d). Increased growth rate and 100% step coverage and conformality are attained.Type: ApplicationFiled: November 4, 2015Publication date: March 3, 2016Inventors: Shankar Swaminathan, Ananda Banerji, Nagraj Shankar, Adrien LaVoie
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Publication number: 20150380302Abstract: A dielectric diffusion barrier is deposited on a substrate that has a via and an overlying trench etched into an exposed layer of inter-layer dielectric, wherein there is exposed metal from the underlying interconnect at the bottom of the via. In order to provide a conductive path from the underlying metallization layer to the metallization layer that is being formed over it, the dielectric diffusion barrier is formed selectively on the inter-layer dielectric and not on the exposed metal at the bottom of the via. In one example a dielectric SiNC diffusion barrier layer is selectively deposited on the inter-layer dielectric using a remote plasma deposition and a precursor that contains both silicon and nitrogen atoms. Generally, a variety of dielectric diffusion barrier materials with dielectric constants of between about 3.0-20.0 can be selectively formed on inter-layer dielectric.Type: ApplicationFiled: June 17, 2015Publication date: December 31, 2015Inventors: Thomas Weller Mountsier, Hui-Jung Wu, Bhadri N. Varadarajan, Nagraj Shankar, William T. Lee
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Publication number: 20150380272Abstract: Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.Type: ApplicationFiled: June 30, 2014Publication date: December 31, 2015Inventors: Hui-Jung Wu, Thomas Joseph Knisley, Nagraj Shankar, Meihua Shen, John Hoang, Prithu Sharma
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Patent number: 9214334Abstract: Methods of depositing conformal aluminum nitride films on semiconductor substrates are provided. Disclosed methods involve (a) exposing a substrate to an aluminum-containing precursor, (b) purging the aluminum-containing precursor for a duration insufficient to remove substantially all of the aluminum-containing precursor in gas phase, (c) exposing the substrate to a nitrogen-containing precursor to form aluminum nitride, (d) purging the nitrogen-containing precursor, and (e) repeating (a) through (d). Increased growth rate and 100% step coverage and conformality are attained.Type: GrantFiled: February 18, 2014Date of Patent: December 15, 2015Assignee: Lam Research CorporationInventors: Shankar Swaminathan, Ananda Banerji, Nagraj Shankar, Adrien LaVoie
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Patent number: 9190489Abstract: Various embodiments herein relate to formation of contact etch stop layers in the context of forming gates and contacts. In certain embodiments, a novel process flow is used, which may involve the deposition and removal of a sacrificial pre-metal dielectric material before a particular contact etch stop layer is formed. An auxiliary contact etch stop layer may be used in addition to a primary etch stop layer that is deposited previously. In certain cases the contact etch stop layer is a metal-containing material such as a nitride or an oxide. The contact etch stop layer may be deposited through a cyclic vapor deposition in some embodiments. The process flows disclosed herein provide improved protection against over-etching gate stacks, thereby minimizing gate-to-contact leakage. Further, the disclosed process flows result in wider flexibility in terms of materials and deposition conditions used for forming various dielectric materials, thereby minimizing parasitic capacitance.Type: GrantFiled: September 8, 2014Date of Patent: November 17, 2015Assignee: Lam Research CorporationInventors: Thomas Weller Mountsier, Bart J. van Schravendijk, Ananda K. Banerji, Nagraj Shankar
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Patent number: 9153482Abstract: Methods and apparatus for selective deposition of cobalt on copper lines in the presence of exposed dielectric in semiconductor processing are provided. Cobalt in its metallic form is selectively deposited onto copper in the presence of dielectric by contacting a prepared surface of the substrate with an organometallic cobalt compound in a presence of a reducing agent. Surface preparation involves H2 treatment with concurrent UV light irradiation. After the substrate surface is prepared, the substrate is contacted with an organometallic cobalt compound comprising a substituted or unsubstituted allyl ligand in a presence of a reducing agent to selectively deposit cobalt on copper. No plasma treatment during or after cobalt deposition is necessary, and the method can be used in a presence of a ULK dielectric without causing damage to dielectric. Deposited cobalt caps are used to reduce copper electromigration and to improve adhesion of copper to subsequently deposited layers.Type: GrantFiled: February 3, 2014Date of Patent: October 6, 2015Assignee: Lam Research CorporationInventors: Thomas Joseph Knisley, Nagraj Shankar, Pramod Subramonium
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Publication number: 20150235835Abstract: Methods of depositing conformal aluminum nitride films on semiconductor substrates are provided. Disclosed methods involve (a) exposing a substrate to an aluminum-containing precursor, (b) purging the aluminum-containing precursor for a duration insufficient to remove substantially all of the aluminum-containing precursor in gas phase, (c) exposing the substrate to a nitrogen-containing precursor to form aluminum nitride, (d) purging the nitrogen-containing precursor, and (e) repeating (a) through (d). Increased growth rate and 100% step coverage and conformality are attained.Type: ApplicationFiled: February 18, 2014Publication date: August 20, 2015Applicant: Lam Research CorporationInventors: Shankar Swaminathan, Ananda Banerji, Nagraj Shankar, Adrien LaVoie
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Publication number: 20150221542Abstract: Methods and apparatus for selective deposition of cobalt on copper lines in the presence of exposed dielectric in semiconductor processing are provided. Cobalt in its metallic form is selectively deposited onto copper in the presence of dielectric by contacting a prepared surface of the substrate with an organometallic cobalt compound in a presence of a reducing agent. Surface preparation involves H2 treatment with concurrent UV light irradiation. After the substrate surface is prepared, the substrate is contacted with an organometallic cobalt compound comprising a substituted or unsubstituted allyl ligand in a presence of a reducing agent to selectively deposit cobalt on copper. No plasma treatment during or after cobalt deposition is necessary, and the method can be used in a presence of a ULK dielectric without causing damage to dielectric. Deposited cobalt caps are used to reduce copper electromigration and to improve adhesion of copper to subsequently deposited layers.Type: ApplicationFiled: February 3, 2014Publication date: August 6, 2015Inventors: Thomas Joseph Knisley, Nagraj Shankar, Pramod Subramonium
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Publication number: 20140217193Abstract: A substrate processing system includes a showerhead that comprises a head portion and a stem portion and that delivers precursor gas to a processing chamber. A baffle includes a base portion having an outer diameter that is greater than an outer diameter of the head portion of the showerhead, that comprises a dielectric material and that is arranged between the head portion of the showerhead and an upper surface of the processing chamber.Type: ApplicationFiled: February 6, 2013Publication date: August 7, 2014Applicant: Novellus Systems, Inc.Inventors: Patrick Breiling, Kevin Gerber, Jennifer O'Loughlin, Nagraj Shankar, Pramod Subramonium
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Publication number: 20140216336Abstract: Disclosed methods cap exposed surfaces of copper lines with a layer of metal or metal-containing compound combined with silicon. In some cases, the metal or metal-containing compound forms an atomic layer. In certain embodiments, the methods involve exposing the copper surface first to a metal containing precursor to form an atomic layer of adsorbed precursor or metal atoms, which may optionally be converted to an oxide, nitride, carbide, or the like by, e.g., a pinning treatment. Subsequent exposure to a silicon-containing precursor may proceed with or without metallic atoms being converted.Type: ApplicationFiled: April 3, 2014Publication date: August 7, 2014Applicant: Novellus Systems, Inc.Inventors: Jengyi Yu, Gengwei Jiang, Pramod Subramonium, Roey Shaviv, Hui-Jung Wu, Nagraj Shankar
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Patent number: 8753978Abstract: Disclosed methods cap exposed surfaces of copper lines with a layer of metal or metal-containing compound combined with silicon. In some cases, the metal or metal-containing compound forms an atomic layer. In certain embodiments, the methods involve exposing the copper surface first to a metal containing precursor to form an atomic layer of adsorbed precursor or metal atoms, which may optionally be converted to an oxide, nitride, carbide, or the like by, e.g., a pinning treatment. Subsequent exposure to a silicon-containing precursor may proceed with or without metallic atoms being converted.Type: GrantFiled: June 1, 2012Date of Patent: June 17, 2014Assignee: Novellus Systems, Inc.Inventors: Jengyi Yu, Gengwei Jiang, Pramod Subramonium, Roey Shaviv, Hui-Jung Wu, Nagraj Shankar