Patents by Inventor Nai-Shuo Cheng

Nai-Shuo Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8610503
    Abstract: Apparatus and methods for oscillation suppression are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. The plurality of power amplifiers include a first power amplifier, a second power amplifier, and a third power amplifier, each of which are configured to be individually switchable between an enabled state and a disabled state so as to control a power amplification of the power amplifier system. A first capacitor is electrically connected between the outputs of the first and second power amplifiers, and a second capacitor is electrically connected between the outputs of the second and third power amplifiers. The first and second capacitors are configured to allow signals generated using the first, second, and third power amplifiers to combine constructively to generate the output RF signal.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: December 17, 2013
    Assignee: Skyworks Solutions, Inc.
    Inventors: Daniel Lee Kaczman, Haibo Cao, Russ Alan Reisner, Nai-Shuo Cheng, James Phillip Young
  • Publication number: 20130015836
    Abstract: A low noise step-down converter includes a rectified voltage output, a pulse generator, a rectifying diode, a rectifying inductor, a rectifying capacitor, and an impedance element. The rectified voltage output is provided for outputting a converted voltage. The pulse generator includes a pulse wave output. The pulse generator receives an input voltage and outputs a pulse wave through the pulse wave output. The rectifying diode is reversely coupled to the pulse wave output. One end of the rectifying inductor is connected to the pulse wave output for receiving the pulse wave while the other is connected to the rectified voltage output. One end of the rectifying capacitor is connected to the rectified voltage output, and the other end is electrically grounded. The impedance element at least provides resistance impedance and inductance impedance, wherein the rectifying diode and the impedance element are connected in series and are electrically grounded.
    Type: Application
    Filed: September 14, 2011
    Publication date: January 17, 2013
    Applicant: Wistron Corporation
    Inventors: Chiu-Hsien Chang, Ming-Feng Wu, Nai-Shuo Cheng, Yen-Ting Chen
  • Publication number: 20120154054
    Abstract: Apparatus and methods for oscillation suppression are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. The plurality of power amplifiers include a first power amplifier, a second power amplifier, and a third power amplifier, each of which are configured to be individually switchable between an enabled state and a disabled state so as to control a power amplification of the power amplifier system. A first capacitor is electrically connected between the outputs of the first and second power amplifiers, and a second capacitor is electrically connected between the outputs of the second and third power amplifiers. The first and second capacitors are configured to allow signals generated using the first, second, and third power amplifiers to combine constructively to generate the output RF signal.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 21, 2012
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Daniel Lee KACZMAN, Haibo CAO, Russ Alan REISNER, Nai-Shuo CHENG, James Phillip YOUNG
  • Patent number: 6954623
    Abstract: A power amplifier having a phase shift and impedance transformation element is disclosed. The power amplifier comprises a plurality of amplification paths, a first phase shift element at an input of each amplification path and a second phase shift element at an output of each amplification path. The amplifier also comprises an impedance transformation element associated with the second phase shift element and a power combiner configured to combine an output of each amplification path into a single output.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: October 11, 2005
    Assignee: Skyworks Solutions, Inc.
    Inventors: Shiaw W. Chang, Hugh J. Finlay, Nai-Shuo Cheng, Bon-Seok Park
  • Patent number: 6946911
    Abstract: An exemplary bias circuit is coupled to an amplifier. The bias circuit comprises a first bipolar transistor, a second bipolar transistor and a third bipolar transistor. The first bipolar transistor has a base connected to a first node, and the first node is connected to a reference voltage through a first resistor. The second bipolar transistor has a base connected to the first node. The third bipolar transistor has a collector connected to the first node and a base connected to an emitter of the first bipolar transistor at a second node. An emitter of the second bipolar transistor is connected to a base of a fourth bipolar transistor associated with the amplifier, and the second bipolar transistor does not have a resistor connected to the emitter of the second bipolar transistor.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: September 20, 2005
    Assignee: Skyworks Solutions, Inc.
    Inventors: Youngoo Yang, Kevin Choi, Nai-Shuo Cheng
  • Publication number: 20050030105
    Abstract: An exemplary bias circuit is coupled to an amplifier. The bias circuit comprises a first bipolar transistor, a second bipolar transistor and a third bipolar transistor. The first bipolar transistor has a base connected to a first node, and the first node is connected to a reference voltage through a first resistor. The second bipolar transistor has a base connected to the first node. The third bipolar transistor has a collector connected to the first node and a base connected to an emitter of the first bipolar transistor at a second node. An emitter of the second bipolar transistor is connected to a base of a fourth bipolar transmitter associated with the amplifier, and the second bipolar transistor does not have a resistor connected to the emitter of the second bipolar transistor.
    Type: Application
    Filed: August 8, 2003
    Publication date: February 10, 2005
    Inventors: Youngoo Yang, Kevin Choi, Nai-Shuo Cheng
  • Patent number: 6842072
    Abstract: According to one exemplary embodiment, a gain reduction circuit comprises a first terminal, where the first terminal is coupled to a control signal. The gain reduction circuit further comprises a second terminal, where the second terminal is coupled to an input of an amplifier, and where the amplifier is configured to operate in low-power mode and high-power mode. The gain reduction circuit further comprises a transistor coupled to the first terminal and the second terminal. The transistor can be, for example, a bipolar transistor, such as an NPN GaAs heterojunction bipolar transistor, having a base, a collector, and an emitter, where the base being is coupled the control signal, the collector is coupled to the input of the amplifier, and the emitter is coupled to ground. According to this exemplary embodiment, the transistor causes a gain of the amplifier to be reduced when the amplifier is operating in low-power mode.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: January 11, 2005
    Assignee: Skyworks Solutions, Inc.
    Inventors: Nai-Shuo Cheng, Kevin Choi, Peter P. Tran
  • Publication number: 20040185916
    Abstract: A power amplifier having a phase shift and impedance transformation element is disclosed. The power amplifier comprises a plurality of amplification paths, a first phase shift element at an input of each amplification path and a second phase shift element at an output of each amplification path. The amplifier also comprises an impedance transformation element associated with the second phase shift element and a power combiner configured to combine an output of each amplification path into a single output.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 23, 2004
    Inventors: Shiaw W. Chang, Hugh J. Finlay, Nai-Shuo Cheng, Bon-Seok Park