Abstract: An apparatus for processing an information signal representative of information and containing phase error. The apparatus includes a detector for detecting the information in the signal and an error signal generator for generating an error signal representative of the error. A phase lock loop makes corrections which tend to reduce the phase error. The gain of the phase lock loop is adjusted in accordance with the error signal to optimize system performance.

Abstract: In a receiver, an analog-to-digital converter is adapted to sample a distorted analog signal to provide a plurality of distorted digital symbols separated in time by a particular interval. In an equalizer, taps are provided with variable multiplying coefficients which sequentially multiply the distorted digital symbols to provide undistorted digital symbols. A timing control network is responsive to variation in one of the multiplying coefficients to control the timing of the converter and hence the duration of the particular interval.

Abstract: A control system comprising a gain control circuit for adjusting the gain of an input signal to provide a gain controlled signal and an integrator for integrating the gain controlled signal to provide an output signal. A first circuit responds to a particular condition for changing the gain of the gain control circuit and a second circuit responds to that same condition for changing the output signal independently of the gain control signal to bring about a more rapid change in the output signal than could be brought about solely by changing the gain controlled signal.