Patents by Inventor Najeeb Darawshy

Najeeb Darawshy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Reordering avoidance for flows during transition between slow-path handling and fast-path handling
    Patent number: 10824469
    Abstract: A computer system includes one or more processors, one or more hardware accelerators, and control circuitry. The processors are configured to run software that executes tasks in a normal mode. The accelerators are configured to execute the tasks in an accelerated mode. The control circuitry is configured to receive one or more flows of tasks for execution by the processors and the accelerators, assign one or more initial tasks of each flow for execution by the processors, assign subsequent tasks of each flow for execution by the accelerators, and verify, for each flow, that the accelerators do not execute the subsequent tasks of the flow until the processors have fully executed the initial tasks of the flow.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: November 3, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Eitan Hirshberg, Ariel Shahar, Najeeb Darawshy, Omri Kahalon
  • Reordering avoidance for flows during transition between slow-path handling and fast-path handling
    Publication number: 20200167192
    Abstract: A computer system includes one or more processors, one or more hardware accelerators, and control circuitry. The processors are configured to run software that executes tasks in a normal mode. The accelerators are configured to execute the tasks in an accelerated mode. The control circuitry is configured to receive one or more flows of tasks for execution by the processors and the accelerators, assign one or more initial tasks of each flow for execution by the processors, assign subsequent tasks of each flow for execution by the accelerators, and verify, for each flow, that the accelerators do not execute the subsequent tasks of the flow until the processors have fully executed the initial tasks of the flow.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 28, 2020
    Inventors: Eitan Hirshberg, Ariel Shahar, Najeeb Darawshy, Omri Kahalon