Patents by Inventor Nakamura Shigeo

Nakamura Shigeo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7457083
    Abstract: Due to the raised operating rotation speed, it has become an important technical theme to reduce fluid vibrations caused by high speed air flows passing the wiring extension in a head gimbal assembly in order to raise the positioning accuracy for higher density recording. Embodiments of the present invention provide a spring structure to the wiring extension. In a wiring extension holding section formed on the carriage side, the wiring extension is retained at the center of the groove of the holding section by the repulsive force of spring members. By preventing the wiring extension from being directly subject to high speed air flows generated by a high-speed rotating disk, this structure is intended to suppress vibrations of the wiring extension caused by high-speed air flows passing the wiring extension.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: November 25, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Maeda Naoki, Hagiya Shinobu, Nakamura Shigeo, Takahashi Haruhide, Sega Masahiko, Wakatsuki Kousaku
  • Patent number: 5063491
    Abstract: A voltage drop detection circuit (1) able to detect a drop in an output voltage of a switching regulator which includes an error detection circuit for detecting a difference between the output voltage and a predetermined value and a feedback circuit (PC1, R1) for controlling a control circuit (2) of a switching transistor in response to an output signal from the error detection circuit (R2, R4, R5, IC1). The voltage drop detection circuit (1) is constructed to operate by using the output of the error detection circuit (R2, R4, R5, IC1) as a control input. When the output voltage becomes lower than the predetermined value, the current of a shunt regulator (IC1) is cut off, a transistor (Q2) is turned off, and a voltage drop is output from terminals (E1, E2).
    Type: Grant
    Filed: January 12, 1990
    Date of Patent: November 5, 1991
    Assignee: Fanuc Ltd.
    Inventor: Nakamura Shigeo