Abstract: A transistor includes a substrate, a two-dimensional material including at least one layer that is substantially vertically aligned on the substrate such that an edge of the layer is on the substrate and the layer extends substantially vertical to the substrate, a source electrode and a drain electrode connected to opposite ends of the two-dimensional material, a gate insulation layer on the two-dimensional material between the source electrode and the drain electrode, and a gate electrode on the gate insulation layer. Each layer includes a semiconductor having a two-dimensional crystal structure.

Abstract: A transistor includes a substrate, a two-dimensional material including at least one layer that is substantially vertically aligned on the substrate such that an edge of the layer is on the substrate and the layer extends substantially vertical to the substrate, a source electrode and a drain electrode connected to opposite ends of the two-dimensional material, a gate insulation layer on the two-dimensional material between the source electrode and the drain electrode, and a gate electrode on the gate insulation layer. Each layer includes a semiconductor having a two-dimensional crystal structure.

Abstract: According to example embodiments, an apparatus for etching a two-dimensional material layer includes a stage configured to support an etching target including graphene on the stage, a light source configured to emit light having a wavelength that is shorter than a wavelength of visible light, a mask imprinted with a pattern for transferred onto the etching target, a fluid inlet configured to supply a fluid over the etching target, and a fluid outlet configured to absorb a residue and a reaction product after the fluid is supplied over the etching target using the fluid inlet.